[rt500] How to route flexcomm1(I2C1) to PIO4_6 and PIO4_5?

[yuemingJiang]

Hi,

There are 2 GPIO sets for flexcomm1:

FC1_TXD _SCL_MI SO_WS:        PIO0_8, PIO4_5

FC1_RXD _SDA_MO SI_DATA:    PIO0_9, PIO4_6

How does the RT500 kwon what set should be used for flexcomm1? Is that init PIO4_5 and PIO4_6 in pin_mux.c good enough?

[yuemingJiang]

@kerryzhou , 

Thanks for your great help! I am using PIO4_5,PIO4_6, but cannot get the clock. I assume the steps to use flexcomm1 as I2C would be easy, such as:

CLOCK_AttachClk(kFRO_DIV4_to_FLEXCOMM1);
...
IOPCTL_PinMuxSet(IOPCTL, 4U, 5U, port4_pin5_config);
IOPCTL_PinMuxSet(IOPCTL, 4U, 6U, port4_pin6_config);
...
BOARD_I2C_Init(FLEX1_I2C_BASEADDR, FLEX1_I2C_CLOCK_FREQ);
...
BOARD_I2C_Receive(I2C1, addr, reg, reg_size, (uint8_t*)value, value_size);

Do I need any additional steps?

FYI, I also use CLOCK_AttachClk(kFRO_DIV4_to_FLEXCOMM15) for PMIC, it works well. That is why I don't suspect the issue is from clock source.

[kerryzhou]

Hi @yuemingJiang ,

  What about the your hardware, whether your PIO4_6, PIO4_5 connect to other external component or not? Whether your hardware connection is OK?

Best Regards,

Kerry

[yuemingJiang]

Hi @kerryzhou ,

Yes, PIO4_6 and PIO4_5 to an I2C chip. Thanks @kerryzhou for checking my code.

I will double check with our EE. 

[kerryzhou · Accepted solution]

Hi @yuemingJiang ，

  Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you.

  It is totally determined by the pinmux.c configuration.

Eg, if you use  PIO0_8, PIO0_9, code is:

   const uint32_t port0_pin8_config = (/* Pin is configured as FC1_TXD_SCL_MISO_WS */
                                        IOPCTL_PIO_FUNC1 |
                                        /* Disable pull-up / pull-down function */
                                        IOPCTL_PIO_PUPD_DI |
                                        /* Enable pull-down function */
                                        IOPCTL_PIO_PULLDOWN_EN |
                                        /* Enables input buffer function */
                                        IOPCTL_PIO_INBUF_EN |
                                        /* Normal mode */
                                        IOPCTL_PIO_SLEW_RATE_NORMAL |
                                        /* Full drive enable */
                                        IOPCTL_PIO_FULLDRIVE_EN |
                                        /* Analog mux is disabled */
                                        IOPCTL_PIO_ANAMUX_DI |
                                        /* Pseudo Output Drain is disabled */
                                        IOPCTL_PIO_PSEDRAIN_DI |
                                        /* Input function is not inverted */
                                        IOPCTL_PIO_INV_DI);
    /* PORT0 PIN8 (coords: H12) is configured as FC1_TXD_SCL_MISO_WS */
    IOPCTL_PinMuxSet(IOPCTL, 0U, 8U, port0_pin8_config);

    const uint32_t port0_pin9_config = (/* Pin is configured as FC1_RXD_SDA_MOSI_DATA */
                                        IOPCTL_PIO_FUNC1 |
                                        /* Disable pull-up / pull-down function */
                                        IOPCTL_PIO_PUPD_DI |
                                        /* Enable pull-down function */
                                        IOPCTL_PIO_PULLDOWN_EN |
                                        /* Enables input buffer function */
                                        IOPCTL_PIO_INBUF_EN |
                                        /* Normal mode */
                                        IOPCTL_PIO_SLEW_RATE_NORMAL |
                                        /* Full drive enable */
                                        IOPCTL_PIO_FULLDRIVE_EN |
                                        /* Analog mux is disabled */
                                        IOPCTL_PIO_ANAMUX_DI |
                                        /* Pseudo Output Drain is disabled */
                                        IOPCTL_PIO_PSEDRAIN_DI |
                                        /* Input function is not inverted */
                                        IOPCTL_PIO_INV_DI);
    /* PORT0 PIN9 (coords: H17) is configured as FC1_RXD_SDA_MOSI_DATA */
    IOPCTL_PinMuxSet(IOPCTL, 0U, 9U, port0_pin9_config);

If you use the PIO4_5, PIO4_6, code is:

   const uint32_t port4_pin5_config = (/* Pin is configured as FC1_TXD_SCL_MISO_WS */
                                        IOPCTL_PIO_FUNC5 |
                                        /* Disable pull-up / pull-down function */
                                        IOPCTL_PIO_PUPD_DI |
                                        /* Enable pull-down function */
                                        IOPCTL_PIO_PULLDOWN_EN |
                                        /* Enables input buffer function */
                                        IOPCTL_PIO_INBUF_EN |
                                        /* Normal mode */
                                        IOPCTL_PIO_SLEW_RATE_NORMAL |
                                        /* Full drive enable */
                                        IOPCTL_PIO_FULLDRIVE_EN |
                                        /* Analog mux is disabled */
                                        IOPCTL_PIO_ANAMUX_DI |
                                        /* Pseudo Output Drain is disabled */
                                        IOPCTL_PIO_PSEDRAIN_DI |
                                        /* Input function is not inverted */
                                        IOPCTL_PIO_INV_DI);
    /* PORT0 PIN8 (coords: H12) is configured as FC1_TXD_SCL_MISO_WS */
    IOPCTL_PinMuxSet(IOPCTL, 4U, 5U, port4_pin5_config);

    const uint32_t port4_pin6_config = (/* Pin is configured as FC1_RXD_SDA_MOSI_DATA */
                                        IOPCTL_PIO_FUNC5 |
                                        /* Disable pull-up / pull-down function */
                                        IOPCTL_PIO_PUPD_DI |
                                        /* Enable pull-down function */
                                        IOPCTL_PIO_PULLDOWN_EN |
                                        /* Enables input buffer function */
                                        IOPCTL_PIO_INBUF_EN |
                                        /* Normal mode */
                                        IOPCTL_PIO_SLEW_RATE_NORMAL |
                                        /* Full drive enable */
                                        IOPCTL_PIO_FULLDRIVE_EN |
                                        /* Analog mux is disabled */
                                        IOPCTL_PIO_ANAMUX_DI |
                                        /* Pseudo Output Drain is disabled */
                                        IOPCTL_PIO_PSEDRAIN_DI |
                                        /* Input function is not inverted */
                                        IOPCTL_PIO_INV_DI);
    /* PORT0 PIN9 (coords: H17) is configured as FC1_RXD_SDA_MOSI_DATA */
    IOPCTL_PinMuxSet(IOPCTL, 4U, 6U, port4_pin6_config);

Normally, your hardware already determined which pin you will used, then you just need to configure the related pin in your pinmux.c.

So, chip support 2 group, but the terminal pin is determined by your hardware and pinmux.c configuration.

Wish it helps you!

If you still have question about it, please kindly let me know.

Best Regards,

Kerry