mpc8313uboot norflash use spl boot

[leilei987]

HI

DEAR ALL!

my uboot version is 1.1.6

PM want to me Implement SPL function of norflash
################################################
first MY Private header file is follows:

#define CFG_BR0_BASE 0xe8000000

//this addr is norflash baseaddr,

#define CFG_NOR_RELOC (0x4000)
#if 1
#define CFG_NOR_U_BOOT_DST 0xE8000000
#define CFG_NOR_U_BOOT_START (CFG_NOR_U_BOOT_DST + 0x2120)
#else
#define CFG_NOR_U_BOOT_DST 0x1000000
#define CFG_NOR_U_BOOT_START (CFG_NOR_U_BOOT_DST + 0x120)
#endif
################################################################
second I'm sure spl use follow lds
/*
* (C) Copyright 2007, Freescale Semiconductor Inc.
*
* (C) Copyright 2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/

OUTPUT_ARCH(powerpc:common)
SECTIONS
{
.text :
{
start.o (.text)

*(.text)
*(.fixup)
*(.got1)
}
_etext = .;

.reloc :
{
_GOT_TABLE_ = .;
*(.got*)
__got_end = .;
*(.got2)
}
__got_entries = (__got_end - _GOT_TABLE_) >> 2;

.data :
{
*(.rodata*)
*(.data*)
*(.sdata*)
}

_edata = .;

__bss_start = .;
.bss :
{
*(.sbss)
*(.bss)
}

_end = . ;
}
#########################################################
third I changed nand_boot.c to nor_boot.c

Two main functions

void cpu_init_f (volatile immap_t * im)
{
unsigned int size;
unsigned int err = 0;
ulong len, addr, addr_sp;
ulong *s;
gd_t *id;
bd_t *bd;
gd_t *gd;
void (*uboot) (void* dummy, void* immr);
gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);

/* Clear initial global data */
//memset ((void *) gd, 0, sizeof (gd_t));

gd->reset_status = im->reset.rsr;
//void (*uboot) (void* dummy, void* immr);
/* Turn green led on while we do stage0 */
im->pgio.dir = 1<<28;
im->pgio.odr = 1<<28;
im->pgio.dat = 0;

/* RMR - Reset Mode Register - enable checkstop reset enable */
im->reset.rmr = (RMR_CSRE & (1 << RMR_CSRE_SHIFT));

/* used to generate error character on console if something fails */
local_console_init(im);

/* board specific DDR initialization, shared with u-boot */
size = initdram (0);

#if 0
//memset ((void *) gd, 0, sizeof (gd_t));
addr = CFG_SDRAM_BASE +
(gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
addr &= ~(4096 - 1);
addr -= len;
addr &= ~(4096 - 1);
addr_sp = addr - CFG_MALLOC_LEN;
debug ("Reserving %dk for malloc() at: %08lx\n",
TOTAL_MALLOC_LEN >> 10, addr_sp);

/*
* (permanently) allocate a Board Info struct
* and a permanent copy of the "global" data
*/
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
gd->bd = bd;
debug ("Reserving %d Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
addr_sp -= sizeof (gd_t);
id = (gd_t *) addr_sp;
debug ("Reserving %d Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/*
* Finally, we set up a new (bigger) stack.
*
* Leave some safety gap for SP, force alignment on 16 byte boundary
* Clear initial stack frame
*/
addr_sp -= 16;
addr_sp &= ~0xF;
s = (ulong *)addr_sp;
*s-- = 0;
*s-- = 0;
addr_sp = (ulong)s;
debug ("Stack Pointer at: %08lx\n", addr_sp);

//memcpy (id, (void *)gd, sizeof (gd_t));

relocate_code (addr_sp, id, addr);
#endif
//U_boot_image_crc32_check();
//local_putc('G');
/* shared with u-boot - see start.S */
relocate_code (CFG_NOR_RELOC + 0x10000, 0, CFG_NOR_RELOC);
local_putc('L');
//uboot = (void (*)(void* dummy, void* immr))CFG_NOR_U_BOOT_START;
//(*uboot) (NULL, (void*) CFG_IMMR);
local_reset ();
}

void board_init_r (gd_t * id, ulong dest_addr)
{
#if 1
int blockcopy_count;
unsigned char *dst;
void (*uboot) (void* dummy, void* immr);
int ret;

icache_enable (); /* faster execution */
#if 0
dst = (unsigned char *)CFG_NAND_U_BOOT_DST;
{
int ctr;
unsigned char *src=(unsigned char *)0xE8002000;
for (ctr = CFG_NAND_U_BOOT_SIZE; ctr; ctr--) {
*(dst++) = *(src++);
}
}
#endif

uboot = (void (*)(void* dummy, void* immr))CFG_NOR_U_BOOT_START;
(*uboot) (NULL, (void*) CFG_IMMR);

local_putc('K');
local_reset ();
#endif
}

Two images will be generated

I burn 128k .bin to addr 0xe8000000
burn 275k uboot.bin to addr 0xe8020000
At present, it is a phenomenon always printf KKKKKKKKKK
is board_init_r local_putc('K');

From the top, the relocation is over but Error in final call to main uboot

in spl stage
in start.s file aready define CONFIG_NAND_SPL

Is there any address not set correctly?

thanks a lot!

[ufedor]

For NOR Flash booting there is no need for SPL because code can be executed from the memory-mapped Flash directly.

[leilei987]

I see  I know

I have expressed this view with my director many times

But it didn't work at all。

He made me have to do it

The official big level presses the human.

[ufedor · Accepted solution]

There is no SPL solution for MPC8313 NOR boot from NXP.

Please consider using NXP Professional Engineering Services:

https://www.nxp.com/support/support/nxp-engineering-services:SW-SUPPORT