Hello!
I am using UJA1079 SBC in my application (for LIN, WDG and power supply).
If I ignore the WDG update then I have SBC reset periodically in every 128 ms (default NWP) which is the expected reaction.
But somehow right after the power on ("cold reset") the first reset cycle takes about 260 ms. Only the first one then the others come nicely in every 128 ms.
Is this the intended behavior or something can be wrong with my hardware (PCB)?
解決済! 解決策の投稿を見る。
Hi László,
I am not so familiar with this older SBC UJA1079, but the attached AH1002 gives the description below.
So after system reset, the watchdog configuration must be executed in 256ms before it starts, I guess.
Best regards,
Tomas
Hello Tomas,
Thanks a lot for the fast replay and the specification! It seems to be very detailed and helpful.
regards
Laszlo