Hello Jamey,
The PCA9698 has three address pins AD0/AD1/AD2.
Only using a binary logic (Vdd or Vss) would limit the possibility to only 8 PCA9698 on the same I2C bus.
By using SCL & SDA also as address decoding allows to increase the number of PCA9698 up to 64 per I2C bus.
The position from the address inputs AD0/AD1/AD2 get sampled once of ever during the Power On Reset (POR) sequence. As a consequence, SDA and SCL state changes after POR have no influence on addressing.
Best regards,
Tomas