SPT3.1 Can I change OUTPUT Memory layout:WR_2?

[Shi_test]

I want to change 512-128-4 OUTPUT Memory layout:WR_2.There is WR_2 :

But I got wrong result（left is WR_2,right is using WR_6 change WR_2 ）：

• That means we can't to change WR_2?

[petervlna · Accepted solution]

Hello,

I am not clear what kind of memory layout you want to apply, I can only provide some advice before you provide more details:(SPT3.1 should only in S32R45.)

1. please note the parameter of the sptContext structure are loaded to WRx in order. should check that Parameters in WR_6 are valid in kernel debugging.

2. WR2 address is used as input parameter, the address of SRAM offset in WR2 will be copied to image part of WR_13, or used in WR_14. so developers should take care of these output address WRX if want apply new memory layout. as well as vector length used in the PDMA, and offset steps in WR_15. see attached picture.

3. It is not easy to modify the SPT kernel if customer is not familiar with the SPT, I recommend read the "SPT_Kernels_RRM_Design_Document.pdf "to know more about the RSDK SPT Kernel data organization and code flow. path: S32R45_RSDK__1.0.0\Docs\SPT\Kernels_data_flow\S32R45\SPT_Kernels_RRM_Design_Document.pdf.

Best regards,

Peter

[petervlna]

Hello,

I have asked RADAR team for clarification.

best regards,

Peter