SC18MI700 payload limitation ?

[mhed]

Hi, for one ope our project, we have a FPGA which will be connected to a NXP SoC with an I2C bus. On this bus FPGA is a slave.
To make test, we use a Microsemi evaluation board and a bridge I2C to UART (SC18IM700) to communicate between a PC and the FPGA. But we encountered an issue. We tried to make an access (read from host) of 65 byte, but only 2 are send by the bridge. We've made another test with 48 bytes and all works fine.

With same FPGA and same configuration, we've made a test where we've replaced the bridge and the PC by a NXP Soc. And is this case we didn't have any problem.

Is there a limitation on payload size on the bridge SM18I700 ?

Best regards

[JozefKozon]

Hi Mathieu,

please see a reply from an application engineer I have contacted.

DESCRIPTION

The FIFO size is 16 max.

With Best Regards,

Jozef

[mhed]

Hi

well i've seen this point in the component datasheet, but in this case why it works with 48 bytes ?

[JozefKozon]

Hi Mathieu,

please see a reply from an application engineer.

DESCRIPTION

Not sure why it works with 48 bytes without some debugging. The customer should not violate the datasheet specification.

With Best Regards,

Jozef