PCA9745B SDO high-impedance state

[daniel_flueckig]

Hi, I use the PCA9745B on a shared SPI bus system with other three non PCA9745B devices in parallel.

Problem: The SDO output signal goes not in the high-impedance state when /CS is high like described in the datasheet section 8.1 :

"8.1 SPI-compatible 4-wire serial interface signals
CS — The active LOW chip select line is used to activate and access the SPI slaves. As
long as CS is HIGH, all slaves will not accept the clock signal or data, and the output SDO
is in high-impedance state. Whenever this pin is in a logic LOW state, data can be
transferred between the master and all slaves."

Regards Daniel

[ebeppler03]

We are also encountering this issue - We have had no luck in debugging - Has anyone else found a resolution?

[aschauss]

The SDO pin did not appear to go into a high impedance state when the chip was not selected. The solution that we went with was to add a tristate buffer before the SDO pin.

[Schauss]

Daniel, were you able to resolve your issue with the PCA9745B SDO pin not going to high impedance when /CS was high.  We are struggling with the same issue.

[aschauss]

Daniel, did you resolve the issue with the SDO not going to its high impedance state, when /CS is high? We seem to be having the same issue.

[TomasVaverka]

Hi Daniel,

Sorry for the delayed response. 

I tested the /CS and SDO pins on PCA9745B demo board today. MCU GPIO pin can drive SDO pin to either high or low level while /CS pin is high (PCA9745B is de-activated), so I could not duplicate what you are seeing.

Could you post here part of your schematic to double check it?

Best regards,

Tomas