NAFE13388 2 wire RTD configuration from AN14102 and AN14127 not working as intended

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NAFE13388 2 wire RTD configuration from AN14102 and AN14127 not working as intended

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RaulD
Contributor I

Hello, my name is Raúl, and I am trying to use the NAFE 13388 analog-to-digital converter to read the values from various resistors using the NAFE's voltage and current excitation (VIEX) features.

 

My main documentation source has been two appnotes, AN14102 and AN14127. In those documents, you are given a simple configuration for, in my case, a 2 wire RTD-ish. I only need to read the voltage from a channel (converting a capture to voltage), and converting the voltage read from the channel to resistance using the Law of Ohm (V = R·I), dividing by 750 microamps (using the config from AN14102). The tests were done using a 1 k ohm resistor, so, the expected voltage read is 0.75 V.

 

So, in the process, I've encountered three main problems:

1. If I connect the resistor from AI1P to AI1N, there is no current flowing through the resistor, so I had to connect both the other end to the resistor and the logical channel to the ground signal (GND).

 

2. I have to leave channel delay configuration, and the rest of the CH_CONFIG2 register to 0, because it makes me read wrong values using the configuration I will explain below, instead of the given 0x2E80 in the AN14102.

 

3. If I am using the same channel to VIEX and voltage reading, I get conversion values that are not suitable for my application. I have to use VIEX from AI2P to GND to keep AI1P signal clean from voltage, and keep a correct reading. In that case, the value read from the ADC is around 4883930 (converted to volts, 0.73 V, which seems reasonable), where as, using AI1P for both VIEX and voltage reading, I only get values around 55500, which translates to 0.01 V. Although, in that scenario, the values of both current and voltage were measured manually, and the values were correct for the given resistor and the configured VIEX, so the thing that is not working here is the value read from the NAFE's channel 0 data register, which supposely, is the value captured from the "analog signal".

 

Also, something that is worth commenting, is that I am using TQ System MBa117XL as my development board, which includes the NAFE to handle analog signals, and in the BSP, a driver for the NAFE and an example to read voltage in 4 channels, which is the one I have modified to do the read from AI1P to GND and the voltage excitation from channel 2.

 

So, there is my doubt. I don't know if I am the one who is doing wrong, or if NXP's appnotes are not right, but my main focus is applying the configuration for the 2 wire RTD correctly to measure the resistor value. I would like to receive help in if that, if possible.

 

Thank you for your time, and best regards.

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hello Raul,

1. That’s correct. The VIEX current must be closed to back to ground. If the resistor is not connected to ground, the VIEX current has no path to return to GND. AI1P and AI1N are very high impedance nodes, so the current cannot flow inside these pins.

3. I don’t have the TqSystem schematic, but I suppose it is similar to NXP suggested schematic. If so, there is a series resistor of 2.4k (see schematic below) which creates a voltage drop when you use the same pin for VIEX and voltage reading. The value you get should correspond to 2.4k+1k.
Of course, when you measure the voltage manually, you just measure the voltage across the 1k resistor, while the chip measure the series between the two.

image004 (7).png

BR, Tomas

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hello Raul,

Adding more info to #3.

Assuming signal path in your board same as NAFE EVB, as explained before, ADC read back will be 750uA*(2400+1000) = ~2.55V compared to DMM measured at the edge connector (J83-pin2) or test hook AI2+ i.e. 0.750V (depends on resistor accuracy and NAFE configuration).

Now if the ADC measurement is not correct, two things to check the Gain (and corresponding Cal pointer) is set based on expected 2.55V and not 0.75V. Also please check that 250 Ohm jumper is off (which doesn’t seem to be the case) as your edge connector measurement of 0.73V close to the expected across 1K rather than 250||1K Ohms.

1.png

2.png

Hope this helps!

BR, Tomas

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RaulD
Contributor I

Hello back, Tomas.

First of all, thank you for your dedication to solve this problem.

Secondly, I've firstly looked for the schematics of the TQ board, and as you correctly supposed, the 2.4 k resistor exists in the configuration. Here's a screenshot of the schematics of the analog part, where the NAFE is installed, for you to know:

RaulD_0-1715686323322.png


Lastly, could you please provide us the value for the current excitation precision error? I am seeing a high variation value with the current off.

As I already said, thank you for you support, it helped a lot!

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hello Raúl,

The absolute precision of the excitation current is not a key parameter with NAFE13388. This is because we provide calibration coefficients dedicated to resistance measurements (see Table 13). By using these coefficients the imprecision of the current value is compensated by the voltage channel reading. You should get a total accuracy of around 0.1% in the resistance measurement (of course using different pin for VIEX and Voltage reading).

In order to use these coefficients, you should copy the chosen gain/offset pair (for example: the OPT_COEF7 and OPT_COEF8) in one of  empty registers of Table 12 (for example: GAIN_COEF8 and OFFSET_COEF8) and select this calibration couple (pointer #8 in this example) when doing the conversion in the selected logical channel. Of course, configure the logical channel with the same setting of the calibration pair in terms of Gain and VIEX value (4x and 1mA, in this example).

If needed, another possibility, is to perform a two steps calibration on your board and calculate your own offset and calibration pair. This will provide a much better accuracy results because all the parasitics of that PCB will be compensated too.

image.png

BR, Tomas

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