In the data sheet of the MMRF5015H RF Power GaN Transistor, I read that the correct biasing sequence of this type of transistor was :
Turning the device ON
1. Set VGS to –5 V
2. Turn on VDS to nominal supply voltage (50 V)
3. Increase VGS until IDS current is attained
4. Apply RF input power to desired level
Turning the device OFF
1. Turn RF power off
2. Reduce VGS down to –5V
3. Reduce VDS down to 0 V (Adequate time must be allowed for VDS to reduce to 0 V to prevent severe damage to device.)
4. Turn off VGS
Can the sequences be changed in the following way without risk to the transistor ?
Turning the device ON
1. Turn on VGS which is preset to voltage needed for the Idq desired (for example - 2.7V)
2. Turn on VDS to nominal supply voltage (50 V)
3. Apply RF input power to desired level
Turning the device OFF
1. Turn RF power off
2. Turn off VDS (Adequate time must be allowed for VDS to reduce to 0 V to prevent severe damage to device.)
4. Turn off VGS
I found an Application Note from Ampleon AN11130 which shows that my above proposal is not possible.
I am still looking for a NXP advice for the bias circuit for the MMRF5015H.
Best regards,
Michel
