LS1046A how can i get 10G SFP+ up/down event

[kkkuox]

Hello,

I am working on a board that use LS1046A. I use DAPP driver. I notice that it does not support phylink and mac_ops. 

Now I have one  10G  SFP+ by XFI without phy chip. I config it as fixed link in dts. But i also want to get this port link up/down event or it can update link status automatically.

My question :

1)how to make this port update its link status automatically like other nomal phy chips?

2)I try to use  "link-gpios<...>" in dts  ,is it usable?

3)Is that possible to make 10G auto change to 1G speed if i link a 1G speed spf?

thanks!

have a nice day!

dts like:

ethernet@f2000 { /* 10GEC2 */
//fixed-link = <0 1 1000 0 0>;
phy-connection-type = "xgmii";
sfp = <&sfp_eth5>;

fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio2_22 3 0>;
};

[June_Lu]

Adding the scripts.

The additional libraries from the archive will be copied in the paths below:

        libreadline.so.6 => /usr/lib/libreadline.so.6

        libtinfo.so.5 => /lib/aarch64-linux-gnu/libtinfo.so.5

Put the iomem binary in the same path as the script.

How to run the scripts:

./mdio_read_ls1046_xfi.sh <memac_physical_base_address> <mmd > <reg_addr>

./mdio_write_ls1046_xfi.sh <memac_physical_base_address> <mmd > <reg_addr> <data>

The examples below are based on MDIO_XFI_PCS Register Descriptions.

Ex:

./mdio_read_ls1046_xfi.sh 0x1af2000 3 1

DIV=0x0000145c

[0000] 0x01af2030: 0x0000145c BE (written)

[0000] 0x01af2034: 0x00000003 BE (written)

[0000] 0x01af203c: 0x00000001 BE (written)

[0000] 0x01af2034: 0x00008003 BE (written)

DATA=0x00000006

In the above read we read the PCS status and observe that Link is Up (bit 2)

Note: Execute the script multiple times to avoid latched values.

Other useful info:

MACs base addresses:

– FM1 mEMAC1: 1AE_0000h

– FM1 mEMAC2: 1AE_2000h

– FM1 mEMAC3: 1AE_4000h

– FM1 mEMAC4: 1AE_6000h

– FM1 mEMAC5: 1AE_8000h

– FM1 mEMAC6: 1AE_A000h

– FM1 mEMAC9: 1AF_0000h

– FM1 mEMAC10: 1AF_2000h

Another way you can check for valid link:

Check Test Control/Status Register 3 - Lane a (LNATCSR3 - LNDTCSR3)

Ex: If you use LANEB you will do a read from (for LANEA use 83c offset):0x1ea087c

iomem r32 0x1ea087c

You will look for CDR_LCK bit.

CDR_LOCK indicates that the SERDES is seeing valid bits at the correct frequency. It does not indicate that the bit error rate is within spec.

If CDR is not set then you will not be able to receive any traffic and the PCS link status bit should be 0 as well.

You can play with both CDR and PCS link status in a bash script and see how does it fit your needs.

Hope all above would help you.

[June_Lu]

Thanks

The SDK driver does not support phylink nor SFP management through GPIO.

There is a variant by which the link in the internal MAC PCS link can be interrogated using bash scripting.

However I do not know if the PCS link goes down when the SFP is unplugged. It needs to be checked.

If this is acceptable for you I can send the script together with the sequence that shows how it works.

Have a nice day!

[kkkuox]

Hi Lu

Thanks for your help.

Could you please send me these materials? I have been troubled by this issue for a week now.

Thank you!

Have a nice day!

[June_Lu]

Would you kindly share the SW version you are using?

For the " 10G auto change to 1G speed",

SDK does not currently support rate adaptation via a SW override of the chosen RCW selection of the HW.

Hence, if RCW chooses XFI, we won't reconfigure on-the-fly to other speed rate.

[kkkuox]

hi lu,

thanks for your reply,

My SW SDK is "LSDK-21.08".

And i still confused about  how to get 10G SFP+ port link status?Is there any solutions?

Look forward to your reply

have a nice day!