HFM clock value question in 568322_flash.cfg

[JimmyMood]

I have noticed that in the flash configuration file for the 56F8322 I am using, the flash controller clock divisor value is set to 0x0A and this seems to be an error.  The proper value for the register is dependant on the SIM clock, and is calculated with the procedure described in section 6.5.3.1 of the Peripheral User Manual.  For a system clock of 60MHz (the default system clock for the 56F8322) the proper register value would be 0x52 to produce a 197kHz flash programming clock.

Why is there a discrepancy between the flash clock divisor in the Peripheral User Manual and the 568322_flash.cfg file?  If the clock divisor is dependant on the system clock, how can the flash_over_jtag programmer assume a clock divisor value without risking incomplete programming or damaging the flash?

-Jim

[DanielM]

Jim,

the PLL is powered down out of reset. The chip is clocked by the internal clock generator which has approx. 8HMz frequency. The system clock is half of that = 4MHz. The Flash module is clocked by 1/2 of system clock = 2MHz. The default divider is 11 (register value of 0x0A) resulting in flash clock of 180kHz.

But you are right - it would be wrong for the flash_over_jtag tool to assume anything. That is why the cfg files are there. Ensuring that they contain the correct data is responsibility of the user.

Daniel

[JimmyMood]

Daniel,

Thanks for the response. 

I know the USB TAP and flash_over_jtag dongles have hardware reset lines, so I assume they halt and then reset the core to clear the OCCS registers and flash divisor.  Then, the system clock is in a known state and it is okay to use a constant flash divisor, correct?

I am trying to impliment a JTAG flash programmer from an embedded 8051 processor.  My primary issue at the moment, is that once a part is erased and then power cycled, I cannot get the chip to go into debug mode reliably.  The JTAG debug instructions return 0x01 "Normal/Reset mode" instead of the 0x0D "Debug mode"  I was asking about the divisor because I'm trying to reconcile some details and get to the bottom of my problem.

I followed "AN1973 - Production Flash Programming for 56F8300.pdf" which referenced the "AN1935. - Programming On-Chip Flash Memories of 56f80x devices using the JTAG.pdf"  Unfortunatly I found out half way through the developement that there were some significant differences between the OnCE and EOnCE debuggers and I have been trying to work from the flash_over_jtag_v2 source code.

If you know anything about accessing the EOnCE module I would appreciate some guidance.

Thanks,

-Jim

[DanielM]

Oh, I forgot to answer your question...

the flash_over_jtag tool attempts to reset the chip, so it relies on the default OCCS configuration. Whether the reset is sucessful or not is another question...

Therefore the OCCS configuration is known and the only unknown is the frequency of the oscillator (on chips which do not have internal clock reference used by the OCCS out of reset by default).

The user therefore still needs to tweak the config file if his crystal frequency differs from the default 8MHz. There is also no guarantee that there is not a mistake in one of the files, so you are absolutely right to question the correctness of the configuration.

Daniel

[DanielM]

Jim,

if the only thing you are after is the flash programming, then there is not much difference between OnCE and EOnCE. The main difference is between the V1 and V2 cores. By pure chance all the V1 based chips use OnCE and all V2 based chips use EOnCE. Another aspect is that all V1 chips use older version of flash module compared to V2 based chips.

Overall you will find that all the V1s are fairly similar and all the V2s are fairly similar, but there are great differences between the two families. This is why two separate programs (flash_over_jtag and flash_over_jtag_v2) exist to support the two groups.

A cannot really recommend a much better reference than the source code the flash_over_jtag programs. These represent a full cook-book on how to do things. True, you need to dig through the code, but the appnote which exists is only for V1 and does not cover V2. There are also some improvements in the flash_over_jtag code which are not covered by the appnote.

This is probably not going to help you a great deal, but at least you know that there is not a perfect reference manual somewhere round the corner you did not find yet...

Daniel