CBTU02044 for PCIe Gen4 support

[Xiaochun_Wang]

Hi NXP experts,

We're doing HW design for our new PCIe Gen4 SSD product. We plan to use CBTU02044 for PCIe lane switching.  Could you please help to check my following questions ?  Thanks in advance.

1. It was metioned in CBTU02044 datasheet  that "Low ON-state resistance: 10 Ω (typ)" ,  will this resistance impact the PCIe receiver dedection feature ?  

It was said in PCIe spec that "The Receiver detection circuit is implemented as part of a Transmitter and must correctly detect whether a load impedance equivalent to a DC impedance implied by the ZRX-DC parameter (40 Ω-60 Ω) is present."

2. PCIe requires series capacitors to provide a DC block between Tx and Rx. Normally the capacitors are placed at Tx side. If we take use of CBTU02044, where shall we put the capacitors ?  On Tx of A side, or B&C side, or both side ?

BR

Xiaochun

[Xiaochun_Wang]

Thanks a lot.

[guoweisun · Accepted solution]

1:10 Ω (typ) is the turn on resistor on the communication wire,this device CBTU02044 is designed for PCIe4,no problem for applicaiton.

2:There are several AC coupling capacitor placement options.

a:The capacitors can be placed between the MUX and the downstream controller, and the MUX is biased by the upstream controller.

b:The capacitors can be placed between the upstream transmitter and the MUX. RX signals on the motherboard sides usually do not require AC coupling capacitors since those capacitors are located on the add-in card. The TX MUX is biased by the downstream controller, and the RX MUX is biased by the upstream controller.