It should be about 5.5MHz, but it depends on your code (see disassembled code in CW). I tried it on 56F8323 with 60MHz bus clock and I measured 5.5MHz on the GPIO_A0 pin. See the following disassembled code:
TEST:
bfset #1,X:0xF2E1 (3 cycles) ; set the high level
bfclr #1,X:0xF2E1 (3 cycles) ; set the low level
bra TEST (5 cycles)
60MHZ / 11 cycles = 5.5MHz