exclusive access operations on S32V234

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exclusive access operations on S32V234

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manu_argue
Contributor I

Hello,

I need to know if the S32V234 SoC implements a Global Monitor [0] between the M4 core and the A53’s cores in order to make use of the exclusive access primitives LDREX/STREX [1] when updating the value of a resource (peripheral register) shared between the cores.

Regards

[0] http://infocenter.arm.com/help/topic/com.arm.doc.dht0008a/CJAGCFAF.html#id3033641

[1] http://infocenter.arm.com/help/topic/com.arm.doc.dht0008a/ch01s02s01.html

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jehoda_refaeli
NXP Employee
NXP Employee

Hello,

Wrong forum, but the answer is no. S32V234 terminates the exclusive monitoring at cluster level. There is no sharing of exclusive access with M4.

SEMA42 allows you to create an application semaphore to share information between the A53 cores and M4 core.

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jehoda_refaeli
NXP Employee
NXP Employee

Hello,

Wrong forum, but the answer is no. S32V234 terminates the exclusive monitoring at cluster level. There is no sharing of exclusive access with M4.

SEMA42 allows you to create an application semaphore to share information between the A53 cores and M4 core.

View solution in original post

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manu_argue
Contributor I

Thanks jehoda.refaeli@nxp.com for the clarification, it wasn't clear to me from the information available in the platform reference manual.

Regards

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