TDA8035 external clock synchronous mode.

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TDA8035 external clock synchronous mode.

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sylvainbouriot
Contributor I

Hello,

am using TDA8035 chip as interface between smart card reader and micro controller. for synchronous and asynchronous card with a external clock generated by a micro-controller.

IN datasheet, we could read the follow sentence: "It is mandatory when an external clock is used, that the clock is applied on XTAL1 before CMDVCCN falling edge"

For asynchronous mode, it's not a problem.
But for synchronous mode, it's a problem, because, if  microcontroller send clock before CMDVCC falling edge, it will be not synchronized with card. (for example Microcontroller send 8 clocks, and card will receive 7 clocks (because card VCC is not yet active )

Have you any suggestion?

Sylvain

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frq09231
NXP Employee
NXP Employee

Recommendation for the clock C3 mangement:

- Clear CMD_VCC

- 50 cycles :

clear C3

wait 1µs

Set C3

wait 1µs

- Wait 3ms

- 12 cycles:

clear C3

wait 1µs

Set C3

wait 1µs

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Jonathan_Iglesias
NXP TechSupport
NXP TechSupport

Dear Sylvain Bouriot,

the role and concept of the clock is quite different in the sync and async card case. For synchronous cards (s9, s10, i2c) clock is anyway coming from MCU so we have only external clock here because the MCU controls generates clock (assert and de-assert line).

Strictly speaking text "It is mandatory when an external clock is used, that the clock is applied on XTAL1 before CMDVCCN falling edge" is relevant for asynchronous card activation when external clock signal is used.

To activate a synchronous card the external clock doesn't need to be applied to the XTAL before CMDVCCN goes low,

but here we have something else...

the first 12 cycles will not be transferred (TDA needs to adjust internal state machine) so after this 12 cycles clock will pass TDA. this is something we have to take care with sync card activation.

BR

Jonathan

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