CLRC663 - GPIO Behavior

[jof]

Hi,

I'm using the CLRC663 to display status leds on a application. When entering low power mode, i shut down the CLRC663 to save power by the hard power down (setting PDOWN high)

Now, when exiting the PDOWN state, i see all leds flash visually, which is an issue to the device, since it looks very weird.

I took a measurement with a oscilloscope and below you can see what i see (only the first sequence is relevant). The MCU boots and enables power to the device and immediatly sets PDOWN Pin high (CLRC663 shutdown). After intializing alot of peripherals, the MCU wants to initialize the CLRC663. For this PDOWN is set low.  100us later, OUT 1 Pin gets high for around 5-6ms before comming low again. As you can see on the scope, the OUT1 pin goes only to about 2V's, instead of 3.3V (PSU Voltage). When switching the IO's regulary in Software, the level is correct at 3.3V

I only put PDOWN low and then immediatly send command to put the device in sleep (software). I do not make any other changes to the CLRC663 at that point

For usage of IO's i disabled the Boundary Scan interface in eeprom.

Any Idea why this happens?

[Kan_Li]

Hi Jonathan，

The OUT 1 pin is also the TDI pin, as I know, the internal pull-up resistor on the TDI pin is enabled. I think that is the reason it is pulled high out of reset.

Have a great day,
Kan

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[jof]

Hi Kan,

Can this be disabled? If not, what resistance have the pullups?
I'm seeing this problem on all I/O's

[Kan_Li]

Hi Jonathan,

I think it can be disable after you change the pin function.

Have a great day,
Kan

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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