TRGMUX trigger in S32k144

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TRGMUX trigger in S32k144

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Sriram
Contributor IV

Hello,

I have some questions about the ADC triggering in S32k144. I am using NXP model based design tool box to build the code. With reference to the S32K1xx ADC guidelines, spec and configuration document (Document Number: AN12217) 

4.4. TRGMUX trigger
For the example code refer to Appendix D.
The TRGMUX is a very flexible module for interconnecting the trigger inputs of peripherals to a wide
variety of internal and/or external trigger signals (timer modules, analog modules flags, external pins). In
particular for ADC  in S32K1xx, the TRGMUX can be used to synchronize conversions with any of the
available trigger signals. It is worth mentioning that the TRGMUX mechanism can be used when triggering
ADC conversions for SC1n registers 0 to 3 [registers SC1A, SC1B, SC1C and SC1D], and this kind of
trigger always goes through the trigger latching gasket.

Does this mean the TRGMUX can be used only for 4 registers ( SC1A to D ) because right now in my model im using 5 registers ( SC1A to SC1E), it seems to work fine. Is there any limitation on using TRGMUX  for 5 registers.

I have attached few pics from the matlab model,

First 2 pics are from the PDB Init dialog box. In adc0 im using 5 channels and they are triggered by trigmux_pdb_trig. All 5 channels seems to be working fine when i trigger it with trigmux 

Sriram_0-1709804126464.png

 

Sriram_1-1709804126423.png

 

The pic below is the ADC init dialog box. In the pre trigger source, there are 3 options - PDB , TRGMUX and SOFTWARE . What is the difference between the PDB trigger and TRGMUX

Sriram_2-1709804127122.png

 

Sriram_3-1709804126471.png

 

Sriram_4-1709804126999.png

 

Thank you

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mariuslucianand
NXP Employee
NXP Employee

Hello @Sriram,

In your thread, you are referring to Appendix D of the AN12217, but your configuration example inside the MBDT does not quite match any of the Appendices of the AN12217. Let me explain.

1. Appendix D configures an external pin to be muxed to the TRGMUX_IN0 trigger source. This one is connected using the TRGMUX to the ADC0_SCA via the ADC Trigger Latching and Arbitration Unit. The 4 channel limitation you mention here is valid but only for this scenario. In other words, when an event appears on the TRGMUX_IN0, such signal automatically triggers an ADC channel, so that the conversion occurs and no PDB is involved. This scenario cannot be achieved in MBDT directly via our blocks and involves custom code usage.

2. In your configuration, things are working differently. Here, the TRGMUX signal is routed to the PDB, and the PDB triggers the ADC. This is why you are able to convert 5 ADC channels.

So the FTM0 initialization trigger  (TRGMUX_in22) is connected via TRGMUX to the TRGMUX_PDB_TRIGGER (PDB0_trigger_in0).

mariuslucianand_0-1710448004098.png

When such input occurs, the PDB starts counting, and when each of the channels' values matches the PDB internal counter, PDB directly triggers the ADC channels, because the ADC is set to have the PDB as Trigger source, not TRGMUX. 

mariuslucianand_1-1710448438627.png

This MBDT configuration is based on the Appendix B of the AD12217 but instead of using the Software Trigger of PDB,  this uses the FTM0 via TRGMUX to trigger the PDB.

So in this case/configuration exemplified in MBDT, you can trigger up to 8 ADC channels/per PDB instance. if you need more than 8 channels, then you can use the both PDB instances, like described below.

mariuslucianand_2-1710449079841.png

 

Hope this helps,

Marius

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mariuslucianand
NXP Employee
NXP Employee

Hello @Sriram,

In your thread, you are referring to Appendix D of the AN12217, but your configuration example inside the MBDT does not quite match any of the Appendices of the AN12217. Let me explain.

1. Appendix D configures an external pin to be muxed to the TRGMUX_IN0 trigger source. This one is connected using the TRGMUX to the ADC0_SCA via the ADC Trigger Latching and Arbitration Unit. The 4 channel limitation you mention here is valid but only for this scenario. In other words, when an event appears on the TRGMUX_IN0, such signal automatically triggers an ADC channel, so that the conversion occurs and no PDB is involved. This scenario cannot be achieved in MBDT directly via our blocks and involves custom code usage.

2. In your configuration, things are working differently. Here, the TRGMUX signal is routed to the PDB, and the PDB triggers the ADC. This is why you are able to convert 5 ADC channels.

So the FTM0 initialization trigger  (TRGMUX_in22) is connected via TRGMUX to the TRGMUX_PDB_TRIGGER (PDB0_trigger_in0).

mariuslucianand_0-1710448004098.png

When such input occurs, the PDB starts counting, and when each of the channels' values matches the PDB internal counter, PDB directly triggers the ADC channels, because the ADC is set to have the PDB as Trigger source, not TRGMUX. 

mariuslucianand_1-1710448438627.png

This MBDT configuration is based on the Appendix B of the AD12217 but instead of using the Software Trigger of PDB,  this uses the FTM0 via TRGMUX to trigger the PDB.

So in this case/configuration exemplified in MBDT, you can trigger up to 8 ADC channels/per PDB instance. if you need more than 8 channels, then you can use the both PDB instances, like described below.

mariuslucianand_2-1710449079841.png

 

Hope this helps,

Marius

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