FS85xx chip Challenger watchdog refresh help

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

FS85xx chip Challenger watchdog refresh help

Jump to solution
571 Views
ErwinR
Contributor II

Hello NXP team,

I am trying to refresh the challenger watchdog of the FS8530 chip during the INIT phase using I2C communication. The problem I am encoutering is that the FS8530 chip power resets every few seconds what probably means that the WD resfresh ends with an error. The FS chip powers the MCU so with every reset the MCU power is also reset. 

According to the FS84-85 datasheet, in order to perform a good watchdog refresh the MCU has to send a calculated LFSR value (recieved from the WD_SEED register) to the WD_ANSWER register. The calculation formula is presented in the second picture. In order for the I2C transmit to be valid the MCU has to send a calculated CRC together with the data. The CRC calculation is presented in the third picture.

Even though I believe I've done the steps like described in the datasheet the FS8530 chip power still resets every few seconds. The I2C communication works well, the FS chip sends a seed value (0xAB2) and the MCU sends the calculated value (0xA54D). Is there something missing during the INIT phase for the FS8530 to stop resetting or is the watchdog refresh is performed wrong?
The whole I2C communication process is presented in the first picture.

ErwinR_0-1699948172000.pngErwinR_1-1699948203613.pngErwinR_2-1699948232488.png

 

Tags (4)
0 Kudos
Reply
1 Solution
352 Views
ErwinR
Contributor II

Hi Kantesh,

I have managed to solve my issue, I will explain what I did. 
First of all, you have to check after what time your FS85 chip resets. If the reset time is about 8 seconds then this means that you have an error in the voltage regulator and need to check your hardware connections. To check which registers have issues with the voltage you can run the device in debug mode and check OVUV, ABIST1 and ABIST2 registers through I2C or SPI communication. The information they provide is explained in the documentation.
If the reset time is about 2 seconds or less, then the voltage regulators are working well and there is an issue in your code. For my code problem the solution was to define the WD window, duty cycle, recovery, disable FCCU12, set its polarity and reset OVUV monitoring during initialization. I've provided a screenshot below.

View solution in original post

0 Kudos
Reply
2 Replies
371 Views
Kantesh
Contributor I

Hello Erwin,

Currently, we're encountering a similar challenge. Were you successful in resolving the issue you encountered last year?

0 Kudos
Reply
353 Views
ErwinR
Contributor II

Hi Kantesh,

I have managed to solve my issue, I will explain what I did. 
First of all, you have to check after what time your FS85 chip resets. If the reset time is about 8 seconds then this means that you have an error in the voltage regulator and need to check your hardware connections. To check which registers have issues with the voltage you can run the device in debug mode and check OVUV, ABIST1 and ABIST2 registers through I2C or SPI communication. The information they provide is explained in the documentation.
If the reset time is about 2 seconds or less, then the voltage regulators are working well and there is an issue in your code. For my code problem the solution was to define the WD window, duty cycle, recovery, disable FCCU12, set its polarity and reset OVUV monitoring during initialization. I've provided a screenshot below.

0 Kudos
Reply