Hi Support Team,
We are using MPC5777C MCU in our Aero project. I have to list out the interrupts which have the enable/disable capability.
From e200Z759N3 Core Reference Manual i understood that we are using IVOR0 to IVOR15 and IVOR32 - IVOR35 and IVOR16 - IVOR are reserved.
Each IVOR is a unique interrupt type.
From Machine State Register (MSR), i understood below interrupts are enable/disable by writing 1/0 in specific bit in MSR register.
Critical Interrupt
Watchdog timer interrupt
External Interrupt
Machine Check
Debug Interrupt
SPE/EFPU Available
Is this my understanding is correct? what about the other interrupt types, is that below interrupt types have enable/disable capability,if so let me know the register names.
Data Storage
Instruction Storage
Alignment
Program
Floating-point unavailable
System cal
AP unavailable
Decrementer
Please let me know what interrupt types we can ignore and what not.
Thanks,
Venkat
MSR[EE] can mask external interrupts,decrementer and fixed interval timer (IVOR1,10 and 11)
MSR[ME] can mask asynchronous machine check (partially IVOR1)
MSR[CE] can mask critical input and watchdog timer (IVOR0 and 12)
MSR[DE] can mask debug events (IVOR15)
MSR[SPE] enables/disables SPE/EFPU units - if disabled IVOR32 may happen, if enabled IVOR33/34 may happen (according circumstances)
The rest does not have such mask bit:
Data Storage interrupt (IVOR2)
Instruction Storage interrupt (IVOR3)
Alignment interrupt (IVOR5)
Program interrupt (IVOR6)
System Call interrupt (IVOR8)
Data TLB Error interrupt (IVOR13)
Instruction TLB Error interrupt (IVOR14)