Hi Community,
I am working on NXP's MPC-LS-VNP-RDB development board.
when i write qspi flash uboot with flexbuild uboot.after reset the console log is
U-Boot 2018.03 (Jul 23 2020 - 15:29:18 +0800)
SoC: LS1043AE Rev1.1 (0x87920211)
Clock Configuration:
CPU0(A53):1400 MHz CPU1(A53):1400 MHz CPU2(A53):1400 MHz
CPU3(A53):1400 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 0810000e 0a000000 00000000 00000000
00000010: 13550002 80004012 40025000 c1002000
00000020: 00000000 00000000 00000000 00018801
00000030: 20004500 00001002 00000096 00000001
Model: OK1043-C
Board: LS1043ARDB, boot from QSPI
SERDES Reference Clocks:
SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00MHZ
I2C: ready
DRAM: Initialzing DDR using fixed setting
Configuring DDR for 1600 MT/s data rate
Waiting for D_INIT timeout. Memory may not work.
When i boot from nand flash,and try to wirte qspiflash .the console log is
resetting ...
U-Boot SPL 2017.07 (Jun 04 2019 - 17:16:04)
Initializing DDR....
Trying to boot from NAND
U-Boot 2017.07 (Jun 04 2019 - 17:16:04 +0530)
SoC: LS1043AE Rev1.1 (0x87920211)
Clock Configuration:
CPU0(A53):1400 MHz CPU1(A53):1400 MHz CPU2(A53):1400 MHz
CPU3(A53):1400 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 0810000e 0a000000 00000000 00000000
00000010: 13550002 80004012 40025000 c1002000
00000020: 00000000 00000000 00000000 00018801
00000030: 20004500 00001002 00000096 00000001
Model: LS1043AVNPRDB Board
Board: LS1043AVNPRDB Version: RevB
Boot from I2C: ready
DRAM: Detected UDIMM Fixed DDR on board
1.9 GiB (DDR3, 32-bit, CL=11, ECC off)
Using SERDES1 Protocol: 4949 (0x1355)
SEC0: RNG instantiated
PPA Firmware: Version LSDK-17.12
Flash: 0 Bytes
NAND: 1024 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: Fman1: Uploading microcode version 108.4.9
Could not get PHY for FSL_MDIO0: addr 0
Failed to connect
PCIe0: pcie@3400000 disabled
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: no link
FM1@DTSEC2, FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@TGEC1
Hit any key to stop autoboot: 0
=> sf probe
SF: unrecognized JEDEC id bytes: 01, 02, 20
Failed to initialize SPI flash at 0:0 (error -2)
=> sf erase 0x100000 0x100000
No SPI flash selected. Please run `sf probe'
=>
No SPI flash selected. Please run `sf probe'
=>
No SPI flash selected. Please run `sf probe'
=> dhcp
FM1@DTSEC3 Waiting for PHY auto negotiation to complete......... TIMEOUT !
FM1@DTSEC3: Could not initialize
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
DHCP client bound to address 192.168.3.165 (1130 ms)
*** Warning: no boot file name; using 'C0A803A5.img'
Using FM1@DTSEC4 device
TFTP from server 0.0.0.0; our IP address is 192.168.3.165; sending through gateway 192.168.3.254
Filename 'C0A803A5.img'.
Load address: 0x90000000
Loading: *
TFTP error: 'File not found' (1)
Not retrying...
=> setenv serverip 192.168.3.253
=> ping 192.168.3.253
Using FM1@DTSEC4 device
host 192.168.3.253 is alive
=> tftp 0xa0000000 rcw_1400_qspiboot.bin
Using FM1@DTSEC4 device
TFTP from server 192.168.3.253; our IP address is 192.168.3.165
Filename 'rcw_1400_qspiboot.bin'.
Load address: 0xa0000000
Loading: #
0 Bytes/s
done
Bytes transferred = 224 (e0 hex)
=> sf probe 0:0
SF: unrecognized JEDEC id bytes: 01, 02, 20
Failed to initialize SPI flash at 0:0 (error -2)
=>
how can i write qspi flash?
should i load image ref 《MPC-LS Vehicle Network ProcessingReference Design Board User Manual》?
Best Regrads
