PWM of MPC5604E/MPC5606E

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PWM of MPC5604E/MPC5606E

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helenshao
Contributor II

Dear Sir/Madam,

 

I'm now working on MPC5606E and I want to generate a PWM but I can't find which module is responsible for it. Could you please help me and give me a reference?

 

Many thanks in advance!

 

 

Best regards,

Helen

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

There is an eTIMER module which has many counting modes and few of them can be used for PWM signal generation. See chapter 28 of the Reference Manual (http://cache.nxp.com/files/microcontrollers/doc/ref_manual/MPC5606ERM.pdf) and refer to Fixed-Frequency and Variable-Frequency PWM mode.

BR, Petr

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helenshao
Contributor II

Dear Petr,

Thanks for answering! Could you please give me a sample code of eTIMER for Fixed-Frequency and Variable-Frequency PWM mode?  I want to write the code on MPC5606E based on a sample code, maybe it can be easier for me.

Many thanks in advance!

Best regards,

Helen

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

I do not have code exactly for the MPC5606E, but you can use the published Pin Toggle stationery, see https://community.freescale.com/docs/DOC-329615 and add the code for eTimer init.

Here is the one I used on MPC5643L. Module is the same, probably you will need rewrite register names as per header file. Also consider different clocking and pad setting.

void eTimer_Init(void)

{

                /* Count until this value, 80 MHz/8000 = 10 kHz PWM period */

                ETIMER_0.CHANNEL[0].COMP1.R = 0;

                ETIMER_0.CHANNEL[0].COMP2.R = 8000;

                ETIMER_0.CHANNEL[0].CMPLD1.R = 0;

                ETIMER_0.CHANNEL[0].CMPLD2.R = 8000;

                ETIMER_0.CHANNEL[0].LOAD.R = 0x0;

                ETIMER_0.CHANNEL[0].CNTR.R = 0x0;

                /* COMP1/COMP2 register is used when the counter is counting up.

                   Load COMP2 with CMPLD2 upon successful compare with the value in COMP2.

                   Load COMP1 with CMPLD1 upon successful compare with the value in COMP1. */

                ETIMER_0.CHANNEL[0].CCCTRL.R = 0xA800; 

                /* Output enable, Toggle OFLAG output using alternating compare registers */

                ETIMER_0.CHANNEL[0].CTRL2.R = 0x8004;

                /* Counts only rising edge of the Fsys (80MHz in RUNx),

                divide by 1, count up until COMP1/COMP2 then reinit, count repeatedly */

                ETIMER_0.CHANNEL[0].CTRL.R = 0x3840;             

                   

}

Code for duty cycle modification

uint16_t i = 0,j=0;

eTimer_Init();

  /* Loop forever */

  for (;;)

  {

    for(i=0;i<1000;i++){};

   

    if(j<8000)         // change the duty cycle

    {

                ETIMER_0.CHANNEL[0].CMPLD1.R = j;

                ETIMER_0.CHANNEL[0].CMPLD2.R = 8000-j;       

    }

    if(j>=8000)

    {

                ETIMER_0.CHANNEL[0].CMPLD1.R = 16000-j;

                ETIMER_0.CHANNEL[0].CMPLD2.R = j-8000;       

    }

    if(j>=16000) j=0;

    else j++;

   

  }

BR, Petr

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