MPC57xx block DMA from non-contiguous source addresses

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MPC57xx block DMA from non-contiguous source addresses

Contributor V


On the MPC574xR, SARADC0 and SARADC1 I want to do a block transfer of the data after an end-of-chain interrupt is generated. When configuring eDMA block transfers, we can only specify the start address and total number of bytes to be transferred. This is very convenient if we have all the data in contiguous memory.

In my case, I have configured chan2, chan5, chan6, chan9, chan11, chan12 in a scan chain and generate an interrupt at the end of chain after chan12 is sampled. The channels are not equally spaced, so I cannot give a fixed offset when configuring the TCD.


Since I use one-shot triggering, the CDATA register is not overwritten until the end of scan chain. After the last channel has been sampled, I can setup eDMA to block transfer  6 x16-bit  values to the destination. Only problem is that my source address increment is not constant - after chan2 is transferred, the source address must be incremented by 12 bytes to access CDATA5, then 4 bytes to access CDATA6, 12 bytes to address CDATA9, 8 bytes to access CDATA11 and 4 bytes to access CDATA12. There is no pattern that I can use to increment the source address.


I do not want to setup 6 eDMA channels, one for a sample from each of the channels in the scan chain. 


Is there an alternative?

Scatter gather DMA appears to be an option but from the documentation it is not clear how it is different from setting up DMA for each data word individually. After each data word is transferred, the source address has to be manually changed for the next DMA, which would incur CPU time. The advantage is that in scatter gather we use only one eDMA channel for the whole data block vs using one eDMA channel for each data word within the data block. 

I am not limited by eDMA channels, however I have stringent time constraints. 


Is there a example for scatter-gather DMA on MPC57xx?

Looking for suggestions or alternatives.

Thank you for responding.






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NXP TechSupport
NXP TechSupport

Hi JoyR,

I think, the most easiest way is to do reading of 11 result registers (ch2 -ch12) into array in a single loop and then read "valid" array element when needed.

The repetitive S/G will not fully work. Once you initialize TCD for first transfer and set the ESG bit in this TCD, after this first transfer is done, new TCD is copied but the ESG is cleared now automatically (regardless of your settings), so third TCD update will not happen.

BR, Petr

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