MPC5777M I2C SCL/SDA pin configuration problem

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MPC5777M I2C SCL/SDA pin configuration problem

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underdangerous
Contributor II

Hi, community:
I am currently using MPC5777M to test two I2Cs as master and slave machines for simple communication. According to the manual requirements, the SCL and SDA pins of both I2C modules are configured as bidirectional, open drain, input buffer enable, and weak pull-up (I think it is only reasonable). However, according to the example code I2C provided by MPC5748G_ As a slave, I cannot receive I2C_ 0 as the first byte of address data sent by the host, and I2C_ The IBSR [IAAS] of 1 has not changed, which is unreasonable. The following is the detailed information of the development board model I am using:
MCU: PPC5777M2MVA8B 0N50N
MOTHERBOARD: MPC57XX
IDE: S32DS FOR PA
DEBUGGER: MULTILINK UNIVERSAL
I have tried the following modification plan:
1. Modify the pin configuration according to 32-bit read and write (as required by SIUL2), and test whether the clock is turned on (it has been proven that the clock is enabled);
2. Use Logic analyzer to measure I2C_ Parsing the first byte of data sent when 0 is the host proves I2C_ When 0 is used as the host, the first byte of the slave address and R/W bit are successfully sent out, but after docking with two I2C modules, the slave cannot receive data and the called flag bit is not set;
Here are my questions:
Is my pin configuration incorrect? If there is an error, how should I modify it?
2. Is there an example code for MPC5777M with two I2C modules as master-slave communication?
The I2C example code of MPC5748G should be portable to 5777 (the IP is the same, so I think so), but I cannot find the reason for the error I encountered above,
The attachment is the I2C configuration code. I hope you can help me. Thank you very much!

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

seems slave's SDA pin is not properly set. You have

SIUL2.MSCR_IO[239].R |= ((1 << 24) | (1 << 19));

but it should be 

SIUL2.MSCR_IO[239].R |= ((1 << 24) | (1 << 19) | (1 << 16) | (1 << 0));

BR, Petr

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