Ok, so I have searched fairly extensively (I think) and tried a number of "target processor" options in S32DS in hopes the compiler would make use of 64-bit registers/instructions for the following.
static uint64_t fredxxx = 0;
while (1)
{
fredxxx++;
}
Disassembly yields:
1a: 48 05 se_li r5,0
1c: 48 16 se_li r6,1
1e: 7d 08 30 14 addc r8,r8,r6
22: 7c e7 29 14 adde r7,r7,r5
26: 54 e0 00 00 e_stw r7,0(0)
26: R_PPC_VLE_SDA21 .sbss.fredxxx.24421
2a: 55 00 00 00 e_stw r8,0(0)
2a: R_PPC_VLE_SDA21 .sbss.fredxxx.24421+0x4
Am I missing something? (feel free to point out if I'm being stupid here...)
