MPC5748G - Separate Ethernet Buffer/Descriptor region with SMPU protection

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MPC5748G - Separate Ethernet Buffer/Descriptor region with SMPU protection

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VinothK
Contributor II

Hi, We are using MPC5748G and have Ethernet 0 configured and working fine.

We have the following memory sections configured in RAM.

ram : ORIGIN = 0x40018000, LENGTH = 0x00080000 /* Internal SRAM for data */

ethbuf : ORIGIN = 0x40090000, LENGTH = 0x00020000 /* Internal SRAM for data */

 

The ethbuf region is used for Eth Tx/Rx buffers and Eth Tx/Rx Buffer descriptors. The map file generated contains the following:

.ethbuf 0x0000000040090000 0x7a80 objs//Eth_31_MPC5748G_PBcfg.o
0x0000000040090000 Eth_TxBuffers_0
0x0000000040093c00 Eth_RxBuffers_0
0x0000000040097800 Eth_TargetTxBufferDescriptors_0
0x0000000040097940 Eth_TargetRxBufferDescriptors_0

This is working fine in normally. Now, we tried to enable memory protection and we are facing issue. We are not able to set the controller mode to Active. After setting the controller mode to active, setting the RDAR(Receive descriptor active register) produces the EBERR and the controller mode gets reset.

We analyzed and found that the EBERR happens because the Ethernet Rx/Tx descriptors region is mpu protected and that is the reason for this error. Cache Inhibit is set for all the memory regions.

We just tried to disable the SMPU_0 and SMPU_1 just to make sure that the mpu protection is the problem and we were able to see the packets.

Can you please suggest what is the correct way to have MPU protection and also to have separate region defined for Eth Rx/Tx buffer  and Eth Rx/Tx buffer descriptors?

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972件の閲覧回数
VinothK
Contributor II

I am able to solve the issue. The issue is that the memory section 'ethbuf' configured for ETH Tx/Rx buffers and descriptors was not accessible by Ethernet0 Bus master. The Ethernet0 Bus master had to be given access by configuring the SMPU's Region Descriptor n, Word 2 properly. The Bus master id was 5 for Ethernet0  and the SMPU for the ethbuf region was SMPU_1. After giving the access, I do not see the EBERR on setting RDAR bit after setting controller mode to ACTIVE. 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Nice to hear that.

Thank you for sharing the solution with us.

 

best regards,

Peter

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973件の閲覧回数
VinothK
Contributor II

I am able to solve the issue. The issue is that the memory section 'ethbuf' configured for ETH Tx/Rx buffers and descriptors was not accessible by Ethernet0 Bus master. The Ethernet0 Bus master had to be given access by configuring the SMPU's Region Descriptor n, Word 2 properly. The Bus master id was 5 for Ethernet0  and the SMPU for the ethbuf region was SMPU_1. After giving the access, I do not see the EBERR on setting RDAR bit after setting controller mode to ACTIVE. 

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JackChen2022
Contributor I

JackChen2022_0-1705632325875.png

Now I have encountered the same problem on the S32K148 chip. I want to know how you solved it at the beginning and what the specific implementation steps are.
I am currently in the process of ENET initialization and an EBERR failure occurs when I write values to registers RDAR and TDAR.

 

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338件の閲覧回数
JackChen2022
Contributor I
这个问题怎么解决啊,如何禁用MPU对以太网的保护
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331件の閲覧回数
JackChen2022
Contributor I
如何授权ENET对缓冲区描述的访问权限,有具体代码实现吗
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