I configured the clock source as IRC,when the XOSC is connected, the system goes well.
void clk_init_IRC(void)
{
SysClk_Init();
InitPeriClkGen();
}
// Enable XOSC, PLL0, PLL1 and enter RUN0 with PLL0 as sys clk (100 MHz)
void SysClk_Init(void)
{
MC_CGM.AC3_SC.B.SELCTL = 0x00; //connect IRC to the PLL0 input
MC_CGM.AC4_SC.B.SELCTL = 0x03; //connect PLL0-PHI1 to the PLL1 input
// Set PLL0 to 100 MHz with 16MHz IRC reference
PLLDIG.PLL0DV.R = 0x30041019; // PREDIV = 1, MFD = 25, RFDPHI = 4, RFDPHI1 = 6
MC_ME.RUN0_MC.R = 0x00130070; // RUN0 cfg: IRCON,OSC0ON,PLL0ON,syclk=IRC
// Mode Transition to enter RUN0 mode:
MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode & Key
MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode & Inverted Key
while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete
while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode
// Set PLL1 to 200 MHz with 66.6666666666667MHz PLL0-PHI1 reference
PLLDIG.PLL1DV.R = 0x00030012; // MFD = 18, RFDPHI = 3
MC_ME.RUN_PC[0].R = 0x000000FE; // enable peripherals run in all modes
MC_ME.RUN0_MC.R = 0x001300F2; // RUN0 cfg: IRCON, OSC0ON, PLL1ON, syclk=PLL0
MC_CGM.SC_DC0.R = 0x80030000; // PBRIDGE0/PBRIDGE1_CLK at syst clk div by 4 ... (25 MHz)
// Mode Transition to enter RUN0 mode:
MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode & Key
MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode & Inverted Key
while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete
while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode
}
void InitPeriClkGen(void)
{
// MC_CGM.SC_DC0.R = 0x80030000; // PBRIDGE0/PBRIDGE1_CLK at syst clk div by 4 ... (25 MHz)
MC_CGM.AC0_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 0
MC_CGM.AC0_DC0.R = 0x80000000; // MOTC_CLK : Enable aux clk 0 div by 1 … (100 MHz)
MC_CGM.AC0_DC1.R = 0x80070000; // SGEN_CLK : Enable aux clk 0 div by 8 … (12.5 MHz)
MC_CGM.AC0_DC2.R = 0x80010000; // ADC_CLK : Enable aux clk 0 div by 2 … (50 MHz)
MC_CGM.AC6_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 6
MC_CGM.AC6_DC0.R = 0x80010000; // CLKOUT0 : Enable aux clk 6 div by 2 … (50 MHz)
MC_CGM.AC10_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 10
MC_CGM.AC10_DC0.R = 0x80030000; // ENET_CLK : Enable aux clk 10 div by 4 … (25 MHz)
MC_CGM.AC11_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 11
MC_CGM.AC11_DC0.R = 0x80030000; // ENET_TIME_CLK : Enable aux clk 11 div by 4 … (25 MHz)
MC_CGM.AC5_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 5
MC_CGM.AC5_DC0.R = 0x80000000; // LFAST_CLK : Enable aux clk 5 div by 1 … (100 MHz)
MC_CGM.AC2_DC0.R = 0x80010000; // CAN_PLL_CLK : Enable aux clk 2 (PLL0) div by 2 … (50 MHz)
MC_CGM.AC1_DC0.R = 0x80010000; // FRAY_PLL_CLK : Enable aux clk 1 (PLL0) div by 2 … (50 MHz)
MC_CGM.AC1_DC1.R = 0x80010000; // SENT_CLK : Enable aux clk 1 (PLL0) div by 2 … (50 MHz)
}
the program stuck at:
while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)
{
}
after function call :clk_init_IRC
why would this happen? Did I miss anything?
Thanks!