MPC5645S access to internal flash for graphics

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

MPC5645S access to internal flash for graphics

ソリューションへジャンプ
832件の閲覧回数
miquel_soler
Contributor I

Hello.

 

I'm Working with MPC5645S demo board with TFT application and code warrior IDE 5.9

 

I have the DCU3 configured and running with a TFT of 800x480.

Following the document (AN4444) called Configuring and using the DCU3 and DCULite on the MPC5645S MCU.

The document explain that if the graphics are stored in internal flash memory, the access setting must be modified from the reset conditions by cleaning the flash PFSACC register to 0x00000000.

In reference manual of MPC5645S (pages 837-838) explain this about the modification of PFSACC register:

" This field is initialized by hardware reset to the value contained in address 0x3E08 of the shadow block of the flash array. An erased or unprogrammed flash sets this field to 0xFFFF_FFFF.

 

Unfortunately I don't know how to access to this shadow block to set the address 0x3E08 register to 0x00000000.

 

Can somebody help me with this problem to solved it.

 

Thanks

 

Miquel Soler i Mir

ラベル(1)
タグ(1)
0 件の賞賛
返信
1 解決策
665件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

You need not to modify the Shadow Flash. You can simple modify the PFSACC register in your code, use e.g

CFLASH0.PFSACC.R = 0x0; //Allow DCU access to int flash.

BR, Petr

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
666件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

You need not to modify the Shadow Flash. You can simple modify the PFSACC register in your code, use e.g

CFLASH0.PFSACC.R = 0x0; //Allow DCU access to int flash.

BR, Petr

0 件の賞賛
返信
665件の閲覧回数
miquel_soler
Contributor I

Thanks for the help.

Now is working.

Where did you found this information ?

Thanks

Miquel Soler i Mir

0 件の賞賛
返信