MPC 5775E-EVB Pad Vs Pin Current

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MPC 5775E-EVB Pad Vs Pin Current

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bchang32
Contributor III

I am looking at the datasheet for the MPC 5775E EVB datasheet and trying to understand the difference between Pad vs Pin current. I see that the limit is 120 mA and the limit per pin appears to be 5 mA. Looking at I/O section, it says the pad limit is .42 or .35 avg. Shouldn't pad vs pin by the same?

I am hoping to use a pin to toggle a relay but it requires 33 mA. If all my other pins are on the uA level, can the pin output more current?

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davidtosenovjan
NXP TechSupport
NXP TechSupport

120mA is not per pad, but I/O power segment. It is not pad, but group of pad - VDDEx/VDDEHx where x specifies power segment (domain)

 

davidtosenovjan_0-1646142645715.png

 

 

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bchang32
Contributor III

Ok thank you, so then is essentially a pad a group of pins (since they share a power segment)? I see that 200 mA is the max for the MCU, so if one segment is saturated at 120 mA, then can the other segments only have ~80 mA?

 

Additionally, if I am only using one pin to output 33 mA, is it able to or is it limited by the 5mA rule. Can I combine pins to toggle a relay (via KCL)?

bchang32_0-1646143590644.png

 

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davidtosenovjan
NXP TechSupport
NXP TechSupport

5mA is injection current limit - it is something completely different.

Injection current flows over internal clamping diodes in case that pin input voltage is higher that power supply voltage VDD (or input voltage is lower that VSS), it is „not wanted“ current. Maximum output currents (given by drive strength) are operating currents (i.e. “wanted“).

Following appnote is dealing with injection current in the great detail:
https://www.nxp.com/docs/en/application-note/AN4731.pdf

We specify the minimum available output high voltage (Voh in the datasheet). The current flow will result in a voltage drop. If too much current is drawn, then the voltage level of the pin can drop below the specified limit of output high voltage - this characteristic is near to linear (the knee on V-I characteristic will be higher).

So V-I characteristic can estimated by linear approximation between points and <Ioh;Voh> and <0mA ; VDD>.

If you need better pin specification, we provide IBIS simulation model.

To combine multiple pins could potentially have impact if these are from different power segment, but much common and better solution is just to put transistor to the way.

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