I don'nt know how to enter debugging mode on MPC5748G.

[kimyoungsu]

i make mpc5748G flash program used to jtag(GPIO)

i made mpc5646c flash program used to jtag(gpio)

MPC5646C enter debugging mode and sram init is under sequence.

//0.Select Tap

MPC5646C >>> ACCESS_AUX_TAP_ONCE 10001

MPC5748G  >>>>>>   AUX_TAP_Z4A 101000 >>>>> is it right on mpc5748g?

// 1. Assert RESET
cable_set_signal( CHAIN->cable, CS_TRST, 0 );

// 2. Set the OCR[DR] and OCR[WKUP]
once_reg_write(bus, "OCMD_OCR", (OCR_WKUP | OCR_DR));

// 3. Deassert RESET
cable_set_signal( CHAIN->cable, CS_TRST, CS_TRST );

// 4. Verify debug mode via the DEBUG bit in the OnCE status register
data = once_target_status( bus );
if ((!(data & OSR_DEBUG)) && (enter_dbg_max-- > 0)) {
     sleep(1);
     goto enter_dbg;
}

if (enter_dbg_max <= 0)
    return -1;

// 5. Clear the OCR[DR] bit while leaving OCR[WKUP] set and set OCR[FDB]
once_reg_write(bus, "OCMD_OCR", (OCR_WKUP | OCR_FDB));

// 2.5. Enableing external debug mode and other initialization
once_reg_write(bus, "OCMD_DBCR0", DBCR0_EDM); // set DBCR0[EDM]  >>>>> is it right on mpc5748g?
once_reg_write(bus, "OCMD_DBSR", 0xFFFFFFFF); // clear DBSR  >>>>> is it right on mpc5748g?

>>>>> do i use mpc5748g EDBCR0 register?

/* TLB0, 4 GByte Memory Space, Not Guarded, Cacheable, All Access */
setup_mmu_tlb(bus, 0x10000000, 0xC0000B00, 0x00000020, 0x0000003F);   >>>>>>>>>>>mpc5748g don't have mmu so removed
mpc5646c_disable_watchdog(bus);
mpc5646c_vector_init(bus); >>>>>>>>>>no init?

// 4.2 Internal SRAM initialization
DEBUGMSG("Internal SRAM initialization!\n");
mpc5646c_sram_init(bus, 0x40005000, 0xFFEEDDCC, 0x800); >>>>>>>>>>>mpc5748g can not access sram???

read 0x40005000 >>>> 0xFFEEDDCC

read 0x40005004 >>>> 0xFFEEDDCC

read 0x40005008 >>>> 0xFFEEDDCC

read 0x4000500c >>>> 0xFFEEDDCC

MPC5646C is Sram init oK!

But MPC5748G is not ok.

I would like know that how to enter debugging mode and read/write register.

I would like to get to goood document.

help me plz

[lukaszadrapa]

Hi,

for test, I used my JTAG sequence which follows AN4365 shared here:

Example JTAG access – Addendum to application notes AN3283 and AN4365 

I tested it on MPC5607B in the past. All I changed now was the AUX_TAP_Z4a (101000). The length of Codes was 5bits on MPC56xx but it is 6bits on MPC5748G. So, I changed this line:

JTAG.SHIFTREG 1 0 0 0 1        ;ACCESS_AUX_TAP_ONCE (command 0x11 (0b10001), least significant bit first)

to

JTAG.SHIFTREG 0 0 0 1 0 1        ;ACCESS_AUX_TAP_ONCE (command 0x11 (0b101000), least significant bit first)

and it works as expected on MPC5748G. The STATUS register is 0x209. And I'm able to do GPR access, SPR access and read/write RAM using OnCE memory access.

Regards,

Lukas

[kimyoungsu]

.

Thank you for your reply.

Unfortunately MPC5748G is made VLE Only
MPC5646C is made VLE and BookE

my jtag programmer used BookE Assembly so cannot run on MPC5748G
i refered uboot asmppc function so made BookE instruction
cpuscr_pc.ir = asmppc(0, "ori 0,0,0", &ret); //vle not supported

do you know how to  make vle instruction like asmvle()?
refer source?

[lukaszadrapa]

I don't know what kind of jtag programmer you use. I think you have to ask manufacturer of your jtag programmer.

Regards,

Lukas