ERM for FLASH rewritten

[20Sidar04]

Dear Mr./Mrs,

I have worked for ERM.I  over-programming Flash  to generate a non-correctable. I used sample programme on Forum. I wonder that what is purpose of SetMSR_ME func on this example? When I try to debug my source during overprogramming, controller doens't enter ISR function called ERM_IRQHandler.  I initiliaze ERM for controller. * ERM_init();
I enable interrupts by using this function *INT_SYS_EnableIRQ(ERM_IRQn);

Best Regards.

[davidtosenovjan]

Could you specify used device?

[20Sidar04]

Dear David,

Sorry, the controller which I work on is MPC5777C.

regards

[davidtosenovjan]

MSR_ME has only little impact, core goes to IVOR1 exception in any attempt to read/execute ECC affected data.

davidtosenovjan_0-1643896882415.png

[20Sidar04]

Dear David,

the problem about not entered to ERM handler during overprogramming on same adress could related with MSR? I wonder that.

Regards.

[davidtosenovjan · Accepted solution]

No, it will go to IVOR1 in both cases. The only way how CPU can process fault read is bus error.

The only exception is data flash where flash controller can return ECC-clean illegal opcode value 0x1555_1555 (according PFCR3[DERR_SUP] setting).

[20Sidar04]

Thanks David,

Best Regards.

[davidtosenovjan]

If you mean following example

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5777C-1b-2b-FLASH-ECC-error-injection...

if goes to IVOR1 exception which is calling ERM handler.

davidtosenovjan_0-1643896375311.png

But ECC error may be also detected by different master than core (eDMA for instance), it this case ERM interrupt should be invoked.