After a prolonged power outage, the SPC5746R program cannot be started when powered on

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After a prolonged power outage, the SPC5746R program cannot be started when powered on

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Jasting
Contributor I

   HELLO!

    The circuit board can only start when powered on for a long time, perhaps a few minutes. When using the S32DS FOR POWER DEBUG, the program stays in the following interface.

Jasting_2-1713233108710.png

    After the occasional successful startup, either restart the power supply or download the program can be started normally. These problems occur again when power is not supplied for a long time.
    This problem occurs in the case of large MCU operating current, 0.2A and above. At present, the circuit board uses 5V switching power supply. At present, the MCU starts the eTPU function, ADC conversion function, PIT, GPIO, etc. The system operating frequency is 200MHz.

    How to deal with this problem,Thanks!

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1 Solution
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petervlna
NXP TechSupport
NXP TechSupport

Hello,

This failure seems to be related to the time of shutdown and power off, the longer the shutdown time, the longer the startup waiting time.

This sound at most strange.

From principal workflow of uC not even possible.

From your description I would even suspect that you have your own design of board and not NXP evaluation board. As it seems to me that your clock source (crystal or so) is waiting for stabilization and therefore preventing your routine to execute.

Also your description looks like there are some capacitors, which need to discharge first before your SW pass certain point of execution.

You can change your clock to IRC, and see the the SW get stuck in the clock routine. I do not think so.

With so little details shared I can hardly guess whats going on here.

Best regards,

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

The circuit board can only start when powered on for a long time, perhaps a few minutes. When using the S32DS FOR POWER DEBUG, the program stays in the following interface.

Hmm, so your board is leaving reset sequence after power on. But your SW is stuck on RAM init routine?

To exclude any HW issues, simply erase the micro and see if the micro leaves reset sequence and end up in BAF endless loop (by default when there is no code) after power on reset.

Best regards,

Peter

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Jasting
Contributor I

Expect your reply,Thank you!

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276 Views
Jasting
Contributor I

Hi,Peter!

Thanks for your reply.But I still don't know what to do next.

This failure seems to be related to the time of shutdown and power off, the longer the shutdown time, the longer the startup waiting time.

The fault occurs when the clock is initialized.

Jasting_0-1713398708140.png

 

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200 Views
petervlna
NXP TechSupport
NXP TechSupport

Hello,

This failure seems to be related to the time of shutdown and power off, the longer the shutdown time, the longer the startup waiting time.

This sound at most strange.

From principal workflow of uC not even possible.

From your description I would even suspect that you have your own design of board and not NXP evaluation board. As it seems to me that your clock source (crystal or so) is waiting for stabilization and therefore preventing your routine to execute.

Also your description looks like there are some capacitors, which need to discharge first before your SW pass certain point of execution.

You can change your clock to IRC, and see the the SW get stuck in the clock routine. I do not think so.

With so little details shared I can hardly guess whats going on here.

Best regards,

Peter

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195 Views
Jasting
Contributor I

Thank you Peter:

Your reply has helped me a lot. After I changed the clock source to IRC, the program began to work properly. The circuit board is designed by ourselves, so whether it can show that there is a problem with the hardware of the crystal vibration part?

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Ok, so now you can check your design with HW design guide and Datasheet and make sure you are following our recommendations.

https://www.nxp.com/webapp/sd/collateral/1627475624121714903044?version=0.1

petervlna_0-1713543867087.png

Best regards,

Peter

 

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