I'm using a MCUXpresso IDE v11.6.1, and a i.MXRT1021 using the SDK 2.11.0.
I'm using the DWT counter to count a few ticks for very brief delays. At the beginning of the code, I configure the counter.
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
I use the counter as
__STATIC_FORCEINLINE __attribute((optimize("O3"))) void MiscTimeWaitPeriodNs( uint64_t p_timeoutNs )
{
uint32_t nowTicks = DWT->CYCCNT;
uint32_t lastTicks;
float elapsedTicksSum = 0;
float timeoutTicks = ( ((float)p_timeoutNs) * ((float)SystemCoreClock )) / 1000000000.0F;
do
{
lastTicks = nowTicks;
nowTicks = DWT->CYCCNT;
elapsedTicksSum += nowTicks < lastTicks ? nowTicks + (UINT32_MAX - (lastTicks - 1)) : nowTicks - lastTicks;
} while ( elapsedTicksSum < timeoutTicks );
}
Everything works fine until I use the trace in the MCUXpresso IDE. When I start profiling, the IDE disables the DWT counter changing the state of the bit DWT_CTRL_CYCCNTENA_Pos in the DWT->CTRL. This change makes the counter DWT-.CYCCNT stops increasing. If I manually reanable this counter both the trace and the code works properly?
The MCUXpresso was supposed to change the state of this bit when I press play?
My question is if the MCUXpresso should disable the counter when play the trace with the processor running. I didn't find any document saying this is supposed to happen. I attached a print of the console of the MCUXpresso where it says the counter has been disabled.
Hi,
I check the MCUXpresso console print info with below DWT_CTRL register setting:
0xE0001000 = 0x40010001
DWT_CTRL address is 0xE0001000, the CYCCNTENA bit is bit 0.
From the register setting, that should enable the CYCCNT.
Software sets DWT_CTRL.CYCCNTENA to 1 to enable the cycle counter.
That looks like the debugger console with incorrect message, should be enable the cycle counter.
Mike
Hi,
I checked the <ARM M7 Architecture Reference Manual> with below description about DWT CYCCNT cycle counter and related timers:
CYCCNT is an optional free-running 32-bit cycle counter. When implemented and enabled, CYCCNT increments on each cycle of the processor clock. When the counter overflows it wraps to zero, transparently. CYCCNT does not increment when the processor is halted in Debug state.
From above description, I think you can enable CYCCNT cycle counter during the trace.
Mike