orphaned signals in CPLD section of LS1046ARDB-PB

[Urmila_123]

hello all,

There are few signals namely PS_VTT_EN and PS_VTT_PG_B which are connected only to CPLD and found no where else. What do they actually mean?

And also where is SD1REFCLK_SEL signal taken from Dip swicth going? Please clarify?

Thanks in Advance

Urmila P.

[Bulat · Accepted solution]

PS_VTT_EN and PS_VTT_PG_B were intended to be used if a separate chip is used to generate VTT voltage for DDR4 memory interface. Since the VTT is generated on the same chip alone with DDR VDD (GVDD), PS_VTT_EN and PS_VTT_PG_B signals are not used on the board.

SD1REFCLK_SEL from the switch goes to the CPLD and to U31 clock source. It selects SD1_REFCLK2 clock frequency between 100MHz and 156.25MHz.

Regards,

Bulat

[Urmila_123]

Thanks bulat, 

CPLD's SD1REFCLK_SEL  is having outward symbol, which is a bit confusing. Hope you clarify.

[Bulat]

CPLD's SD1REFCLK_SEL pin is an input-output signal. At power up it acts as an input, fetches voltage level from the DIP switch, stores the value in the REG_SD1REFCLK_SEL register (see board Ref Manual). Then it becomes an output and drives the value stored in the register.

Regards,
Bulat