lx2080a customer board.
Uart1 is my debugging printf serial port。
Uart2 is the serial port through which I communicate with CPLD。
now ,Under the kernel recognizes the uart2 which is ttyAMA1。
root@localhost:~# ls /dev/ttyAMA0 -l
crw------- 1 root tty 204, 64 Dec 26 10:22 /dev/ttyAMA0
root@localhost:~# ls /dev/ttyAMA1 -l
crw-rw---- 1 root dialout 204, 65 Dec 26 10:21 /dev/ttyAMA1
The CPLD cannot receive the data sent by the LX2080, and the CPU cannot receive the data sent by
the CPLD。
below is a simple test case code。There is no data sent or received at present。
int main()
{
char recvbuf[100];
int ret = 0, fd = 0;
char send[2] = {0x55};
if(fd == 0)
fd = open("/dev/ttyAMA1", O_RDWR );
if(ret <0)
{
perror("can not open ttyAMA1 \n");
exit(1);
}
ret = write(fd,send, 1);
if(ret <0)
{
perror("write ttyS1 0x55 err \n");
exit(1);
}
while(1)
{
memset(recvbuf, 0, sizeof(recvbuf));
ret = read(fd, recvbuf, 90);
printf("len: %d, recvbuf %s \n", ret, recvbuf);
}
close(fd);
return 1;
CONFIG_CONS_INDEX=2,that is set the debug serial port to Uart2, my debug serial port is now Uart1,
this value cannot be changed. Uart2 is the interface for me to communicate with CPLD. So I should not
change “CONFIG_CONS_INDEX=2“
I executed the UART read-write demo.
then,I checked the uart interrupts in /proc/interrupts ,but found no CPU interrupt count for UART2 :
root@localhost:~# cat /proc/interrupts |egrep -i uart
18: 6703 0 0 0 0 0 0 0 GICv3 64 Level uart-pl011
19: 0 0 0 0 0 0 0 0 GICv3 65 Level uart-pl011