SerDes Lane reconfiguration Procedure in LS2085A QDS Board ?

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SerDes Lane reconfiguration Procedure in LS2085A QDS Board ?

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anandhakumarm
Contributor III

Hi All,

anybody know the procedure for serdes lanes reconfiguration in LS2 board. I want to make a separate protocol for my requirement. I dont want that default protocols which are already present.

Thanks..

- Anandh         

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lunminliang
NXP Employee
NXP Employee

Hello Anandha Kumar M,

On LS2085AQDS board, setup a specific SerDes protocol is composed of two steps:

1. Set RCW as alexander specified, set SRDS_PRTCL_S1 and SRDS_PRTCL_S2 for Serdes modules 1 and 2.

2. Set SD1 DIP switches SW7[1:8] and SD2 DIP switches SW8[1:8] on the board, so that they correspond to the SRDS_PRTCL_S1 and SRDS_PRTCL_S2 value selected. FPAG on the  board would use SW7 and SW8 configuration to configure the SD1/2 mulitplexer.


Have a great day,
Lunmin

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anandhakumarm
Contributor III

Hi Lunminliang,

Already i know the points you have mentioned, that is fine. We have 35 (serdes 1 protocol), in that 4 lanes are mapped to XFI and 1 lane for PCIe and rest of the lanes for QSGMII. I don't want that QSGMII lanes. I want a configuration like 4 XFI lanes and 4 PCIe lanes. So I want to override the 35 SerDes 1 Protocol configuration. I want to disable the QSGMII lanes and make it as PCIe lanes. For that, I need some help. Anyway thank u so much for the reply..

-

Thanks

Anandh...

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lunminliang
NXP Employee
NXP Employee

Hi Anandha Kumar M,

What help you need? You could consult to the community.

Regards

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anandhakumarm
Contributor III

Hi Lunminliang,

1) I need to know what is PBI state, not PBL..

2) I need to program some SerDes registers and PCIe registers..

3) How to add those changes to the board..

4) I have a piece of code about the register settings( SerDes and PCIe register with values for overriding)..

5) I need some exact guidance in this, this one must be known by someone who already done SerDes Protocol Overriding..

-

Thanks

Anandh..

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lunminliang
NXP Employee
NXP Employee

Hello Anandha Kumar M,

Sorry for late.

Where did you see th term "PBI state"? Can you please give the context?

What registers are you tring to overide? Can you please specify?

Regards

Lunmin

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anandhakumarm
Contributor III

Hi Lunmin

PBI state is Pre Boot Initialization state. We have done this serdes override configuration successfully. We need to add all those registers and it values in the PBL itself in form of PBI data.

Thanks

Anandh..

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alexander_yakov
NXP Employee
NXP Employee

Serdes protocol is configured in Reset Configuration Word (RCW) - fields SRDS_PRTCL_S1 and SRDS_PRTCL_S2 for Serdes modules 1 and 2, respectively.

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