[LX2160a] Custom board bring-up: mtest and memtester question for DDR memory failures.

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[LX2160a] Custom board bring-up: mtest and memtester question for DDR memory failures.

51,522 Views
saidivvela
Contributor II

we ran DDR memory tests on a custom lx2160a board with 32GB DDR4 arranged with 16GB per Memory controller with Rank0 and Rank 1 per memory controller.

We ran memory test using code warrior QCVS tool did the memtester stress testing. Both the memory controllers are passing all the tests.

mtest is failing with ECC errors and even causing the crash when run from u-boot

memtester is also causing kernel crash when run from Linux.

Attaching logs for mtest failures.

what could be the reason ?

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51,481 Views
saidivvela
Contributor II

We have used the QCVS DDRv tool to do DDR controller configuration validation and optimization. We are using the values from QCVS DDRv tool to configure the same in Bl2. The same values when run using QCVs tool has all tests passing. But they fail when we run using uboot or linux. 

we have exported the DDR registers from QCVs tool that are passing validation and stress tests and used the same in Bl2.
Our board don't have SPD and they are not DIMMs. we have custom RAM installed(soldered) on board.

  

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51,465 Views
yipingwang
NXP TechSupport
NXP TechSupport

If there is no SPD on your target board, there is two methods to configure DDR in atf.

You need to modify atf source code in atf/plat/nxp/soc-lx2160a/lx2160ardb/ddr_init.c.

1. Define CONFIG_STATIC_DDR and modify the struct ddr_cfg_regs static_1600.

2. Define CONFIG_DDR_NODIMM and modify the struct dimm_params ddr_raw_timing.

Which method did you use?

Did you use the same RCW on the target board when using atf and QCVS tool?

You could bootup your target board to enter u-boot, then use reading from the target method to create a QCVS DDR project to check DDR configure files under "Generated_Code" folder, whether DDR configurations are totally the same as you got previously.

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51,443 Views
saidivvela
Contributor II

yes we are modifying atf source code in atf/plat/nxp/soc-lx2160a/lx2160ardb/ddr_init.c to configure our DDR.

We defined CONFIG_DDR_NODIMM and modified the struct dimm_params ddr_raw_timing with the parameters from codewarrior project generated code. 

yes we used the same RCW on the target board when using atf and QCVS tool.

While reading from the target method to create a QCVS DDR project I see Target import error.

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51,411 Views
yipingwang
NXP TechSupport
NXP TechSupport

Would you please capture CCS log to me to do more investigation?

When you click "Read from target" button, CodeWarrior Connection Server(CCS) will pop up in the right bottom of your Windows task bar, please double click it to open the console and type command "log v", then click "Read from target" button again, the low level CCS log will be printed in the console.

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51,266 Views
saidivvela
Contributor II

Read from target worked after resetting codewarrior TAP .
Will update with the log if I face the similar error again.
Thank you.

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51,409 Views
yipingwang
NXP TechSupport
NXP TechSupport

In addition, please use file ddr_init1.c file generated in QCVS DDR tool to replace atf/plat/nxp/soc-lx2160a/lx2160ardb/ddr_init.c directly, then define CONFIG_DDR_NODIMM as 1 in atf/plat/nxp/soc-lx2160a/lx2160ardb/platform.mk.

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51,487 Views
yipingwang
NXP TechSupport
NXP TechSupport

Please use QCVS DDRv tool to do DDR controller configuration validation and optimization. You need to check the following validation items to do validation.

If there is SPD on your target board, please use reading from SPD method to create a QCVS DDR project.

yipingwang_0-1693556957244.png

 

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