LS1021 Serdes configuration: 2PCI (1x) and 2RGMII

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LS1021 Serdes configuration: 2PCI (1x) and 2RGMII

Contributor III

Our board is a variation of the LS1021a IOT with 2 PCI (1x) and 2 RGMII Ethernet.

The IOT's 2 SGMII ports were replaced by 2 RGMII port.

In the reference manual, there are no specific SerDes configuration that would fit the above requirement.

1- Using SERDES configuration 0x10 (lane A: PCI 1x, lane B: SATA, lane C & D: PCI 2x), it was possible to used lane A PCI and the 2 RGMII Ethernet. The 2nd PCI port failed to initialise. 

2- In order to recover the 2nd PCI port for SerDes=0x10, the SerDes_PCCR0 was modified from 0x12 to 0x11. This is supposed to change the PCI#2 from 2x to 1x as we have it implemented in hardware. The PCI driver failed to initialise for PCI#2.

3- Using SerDes configuration 0x20 (lane A: PCI#1 1x, lane B: SGMII1, lane C: PCI#2 1x, lane D: SGMII2), the SerDes_PCCR1 was modified to 0 to disable SGMII 1 & 2. It was hoped the RGMII 1&2 would work but did not. Note: changing PCCR1 does not change or permit modifying the SGMIIM bit of the ECNTRL register.

Should other registers be modified? Can you suggest a way to achieve the proper configuration for our board?

Thank you

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NXP TechSupport
NXP TechSupport

> The 2nd PCI port failed to initialise.

Please consider to create a Technical Case referring the following link and provide additional information:

Please confirm that the latest Linux SDK is used.

Please provide U-Boot booting log as a text file.

Please provide the processor connection schematics as searchable PDF for inspection.

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