I cannot write on the RCPM_PCPH20SETR register

[notshure]

I am trying to send cores 1, 2 and 3 into the PH20 energy state.
To do this, according to the QorIQ LS1043A Reference Manual, Rev. 6, 07/2020,
you need Privileged software set corresponding bit in RCPM PCPH20SETR to 1.
I'm using Das U-Boot to do this, via the command: mw. b 0x1EE_20D4 0x00000001.
But nothing, if I go to both the RCPM_PCPH20SR and RCPM_TWAITSR registers I find them at zero.

So I wonder if it is possible to write directly to this register or if a certain procedure must be performed

[yipingwang]

As per the note in LS1043ARM, Rev. 6, 07/2020:

The power management states of A53 core can be achieved with the software sequence only without the RCPM interaction. The registers given below provides the different status of A53 core:

• • TWAITSR0: Status shows core is in the WFI state
• • POWMGTCSR: LPM20 request and status

[notshure]

Ok, is there any documentation with an example code to be able to understand how to send the different cores in the different energy states?

[yipingwang]

LS1043A only supports the PW15 low power core state. In STANDBYWFI (PW15) state, the core internally gates clocks within the core. You can refer the code of _soc_core_entr_stdby in "plat/nxp/soc-ls1043/aarch64/ls1043.S" in atf.

Also, all cores and clusters are placed in PW15 state only in the SWLPM20 scenario (SoC's low power state). You can refer to 14.1.5.1 SWLPM20 Entry Sequence – System Software from LS1043ARM for details.