Congestion Management using DPAA in LS1043ARDB

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Congestion Management using DPAA in LS1043ARDB

602件の閲覧回数
matt321
Contributor I

Hi,

I'm performing performance tests in LS1043ARDB. I generated a packet storm using iperf and I could observe CPU cores are getting loaded to its maximum.

Also, I verified utilizing single core for handling these packets. 

Now, I'm verifying how to limit the CPU load to 50% using DPAA queue management. 

I could find few user guides explaining this, but I wanted to know how to configure DPAA for 50% core utilization from userspace.

Thanks and Regards

 

#ls1043ardb, #yocto, @yipingwang

ラベル(1)
タグ(3)
0 件の賞賛
返信
3 返答(返信)

524件の閲覧回数
yipingwang
NXP TechSupport
NXP TechSupport

Please refer to the following update from the AE team.

It seems there is no known tool to adjust CPU utilization.
I will query to dpaa1 development team.
Would customer to use "cpulimit" to have a trail?

0 件の賞賛
返信

518件の閲覧回数
matt321
Contributor I

Thanks for your response.

I have tried cpulimit. But still during storming, softirqd is taking more CPU usage for queuing IRQ. 

Basically, I want to stop this queuing when CPU utilization is 50%.

matt321_0-1695288174205.png

I want to implement the concept in this image, could you help me in understanding how I can configure this?

 

0 件の賞賛
返信

437件の閲覧回数
yipingwang
NXP TechSupport
NXP TechSupport

Please refer to the following update from the AE team.

What is the real problem they are trying to solve? They say they generate a packet storm, it seems to be a theoretical performance test. Are they looking to achieve a certain throughput and the CPU is the bottleneck?

Have they tried using DPDK for better CPU loads? Or FMan PCDs to better distribute the traffic?

One QMan-specific feature they could try to adjust is the DQRR interrupt threshold/time-out period. In the SDK DPAA1 driver the values are set at build (CONFIG_FSL_QMAN_PIRQ_DQRR_ITHRESH, CONFIG_FSL_QMAN_PIRQ_IPERIOD). In the upstream DPAA1 driver, these values can be changed at run time with ethtool IRQ coalescing commands.

The best way to limit the DPAA's access to the CPUs is by changing the irq affinity to use only 2/4 cores.

I don't know any ways to limit an irq or a driver to use only 50% of a core. They could use nice/cpulimit for the userspace processes, but I am not aware of any equivalent for the kernel.

0 件の賞賛
返信