CORE AFFINITY

[ranga_yn]

Hello NXP,

we are using LS1046 ARDB board loaded the RT kernel LSDK 21.08 , when we tried to set affinity to 

arch timer -> its giving the error but current smp affinity is set to 1  -

cat /proc/irq/11/smp_affinity

1

but o/p of cat /proc/interrupts its distributed. 

Can we affine arch timer -> if so how,

ot@localhost:~# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
11:   12429150      40335      42559   26121293     GICv2  30 Level     arch_timer
14:          0          0          0          0     GICv2 138 Level     arm-pmu
15:          0          0          0          0     GICv2 139 Level     arm-pmu
16:          0          0          0          0     GICv2 127 Level     arm-pmu
17:          0          0          0          0     GICv2 129 Level     arm-pmu
19:          9          0          0          0     GICv2  75 Level     fsl-ifc
20:          1          0          0          0     GICv2 131 Level     1550000.spi
21:      65149          0          0          0     GICv2  94 Level     mmc0
23:          0          0          0          0     GICv2  77 Level     bman-err, qman-err, fman-err
33:     420122          0          0          0     GICv2 222 Level     QMan portal 0
43:          0          0          0          0     GICv2 223 Level     BMan portal 0
45:     121861          0          0          0     GICv2  96 Level     2100000.spi
46:          0          0          0          0     GICv2  88 Level     2180000.i2c
47:       4966          0          0          0     GICv2  90 Level     21a0000.i2c
48:          0          0          0          0     GICv2  91 Level     21b0000.i2c
49:        782          0          0          0     GICv2  86 Level     ttyS0
50:          0          0          0          0     GICv2  98 Level     gpio-cascade
51:          0          0          0          0     GICv2  99 Level     gpio-cascade
52:          0          0          0          0     GICv2 100 Level     gpio-cascade
53:          0          0          0          0     GICv2 166 Level     gpio-cascade
54:          0          0          0          0     GICv2 118 Level     29d0000.timer
55:          0          0          0          0     GICv2 115 Level     2ad0000.watchdog
56:          0          0          0          0     GICv2 135 Level     eDMA
57:          1          0          0          0     GICv2  92 Level     xhci-hcd:usb1
58:          3          0          0          0     GICv2  93 Level     dwc3-otg, xhci-hcd:usb5
59:          1          0          0          0     GICv2  95 Level     xhci-hcd:usb3
60:          0          0          0          0     GICv2 101 Level     ahci-qoriq[3200000.sata]
74:          0          0          0          0     GICv2 149 Level     PCIe PME
80:          0          0          0          0     GICv2  76 Level     fman, ptp_qoriq
81:          0          0          0          0     GICv2 142 Level     uio_pci_generic
83:         13          0          0          0     GICv2 103 Level     1710000.jr
84:          0          0          0          0     GICv2 104 Level     fsl-jr0
85:          0          0          0          0     GICv2 105 Level     fsl-jr1
IPI0:      6993     457071     389147       1849       Rescheduling interrupts
IPI1:         0        248        237        398       Function call interrupts
IPI2:         0          0          0          0       CPU stop interrupts
IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
IPI4:         0          0          0          0       Timer broadcast interrupts
IPI5:      1396        176          3        150       IRQ work interrupts
IPI6:         0          0          0          0       CPU wake-up interrupts

can we set affinity it IPI interrupt also if yes how .

Thanks,

ranga

[yipingwang]

You need to modify the following in dts file arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi.

timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>;
};