Content originally posted in LPCWare by Wenzu on Tue Mar 15 15:31:11 MST 2011
Hi, Just changing [COLOR=black]#define PLL0CFG_Val 0x0050063 //0x0000000B got the 115k2 to work ok. same with 57k6.
did not try other values..perhaps later.
As for my previous comment, of course, peripherals using the clock as their reference need to be fixed.
This wasn't an issue at all, simply by clocking a desired output, and fixing the registers to give me the appropriate signal seen on a DSO. The one I spent most time to get was the SSP, where both the LPC_SSP0->CPSR prescaler and the LPC_SSP0->CR0 needed to be fixed.
Also, timer, pwm etc are nicer and rounder to work out since the clock is now at 100MHz.
Next is a test at 120Mhz.
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