Content originally posted in LPCWare by gastro54 on Thu Sep 20 10:41:34 MST 2012
Yes, its a capture job.
I am pretty sure I have the registers set up correctly to perform captures in my example code, but I cannot figure out why the LPC_CT32B0->CR[1] register value is changing with no input signal present.
I am trying to measure the time between consecutive captures. I leave timer-32-0 free-running and plan to take the difference between successive reads of LPC_CT32B0->CR[1] in the timer32-0 interrupt (not shown in the example code because its irrelevant, and the problem exists with the interrupt disabled anyway).
I am using MR0 to detect timer overflows, so that I can do the correct arithmetic in case the timer overflowed between two consecutive captures.
From the usermanual:
Quote:
The 32-bit Timer Counter is incremented when the Prescale Counter reaches its terminal
count. Unless it is reset before reaching its upper limit, the TC will count up through the
value 0xFFFF FFFF and then wrap back to the value 0x0000 0000. This event does not
cause an interrupt, but a [B]Match register can be used to detect an overflow if needed[/B].
EDIT: I just made a GPIO toggle in the Timer32-0 interrupt to detect the capture frequency, and I saw a clean output of 1.000 KHz on the GPIO, meaning the capture interrupt is being generated at 2.000 KHz... not sure why. This was with no input on the capture pin.