I’ve not heard of this, but I guess this is implementing a USB interface on chip that can be used to toggle JTAG for debug.
if so, this would mean every chip (the vast majority of which are used for production and will never want to use JTAG for debug) has the extra unused functionality. You will use extra pins (compared to SWD) and have significant extra silicon area (for USB) and so make the chip more expensive just to save a few dollars on a debug interface (the cost of an MCU is based on silicon area and pin count).
My company want to save every fraction of a cent on production costs - the cost of debug probes is completely insignificant. So, I hope they are not doing anything about this.
