Trace data overflow issue in LPC43xx

[lpcware]

Content originally posted in LPCWare by Ramana on Sun Jul 12 21:39:03 MST 2015
Hi all,
I'm using LPC4357, all debugging features are working fine with LPC-Link2 and ULINK-ME.
I don't have cortex 20pin debug + trace connector in my PCB, but I want to use trace features (instruction trace, data watch trace to use in logic analyzer) with KEIL IDE. So I have decided to use trace features through 10pin Cortex debug connector.
But when I'm using trace features by enabling ETB RAM, trace overflow issue error is showing in keil and no instruction & DWT trace(logic analyzer) is properly working. ETB RAM width is 16KB, but data overflow is occurring even the core is operated very lower frequencies(60MHz). There is no difference with or without ETB RAM configuration.
Do Anyone have used instruction& DWT trace through ETB?
Please share any documents or links to use trace in keil through ETB in LPC4357.

Thank you in advance,

[lpcware]

Content originally posted in LPCWare by bavarian on Mon Jul 20 08:18:51 MST 2015
The maximum throughput on the debug interface determines the amount of tracing and profiling you can do.
ETM has the highest throughput (additional 4-bit interface available on the 20-pin connector), we tested this on frequencies up to 144MHz. What happens above? Pretty simple, the clock for this ETM interface suffers from analog effects, signal recovery on the debugger side becomes difficult or impossible. For the Lauterbach debugger you can get an active probe which is able to do a clock recovery, therefore it should work on on 156MHz or even on 168MHz as well, depending on you board design.
Link2 and ULINK-2 or ME can only do the SWD tracing and there we have from the physical point of view only 25% of throughput (4-bit interface compared to 1-bit).
If variable changes are missing, then it might be because of their declarations. Try it with volatile variable declarations. But also here of course: the more internal data you want to see, the higher is the throughput demand.

There are some articles on the web dealing with these ARM debug interfaces, a good one is this:

http://www.isystem.com/files/downloads/Articles/isystem_arm-on-chip-debug-interfaces.pdf

Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by Ramana on Mon Jul 13 03:51:06 MST 2015
Thank you for your valuable information,
I want to capture entire program history and use all available options in keil like code coverage, performance analyser etc.,.
DWT for complete data trace like logical analyzer.
I've tested DWT with SWO pin, but complete data trace is not logged. Some of variable changes are missing.

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Mon Jul 13 00:57:41 MST 2015
The ETB is used for Instruction trace, not for DWT. For DWT you need use SWO Trace (aka SWV Trace).

The ETB traces every instruction. It compresses by effectively just tracing branches. A 16kb ETB will trace a maximum of 16k branches (assuming a branch can be compressed into 1 byte, which it cannot - it is more like 2-3 bytes per branch, but lets go with theoretical maximum here). Assuming a branch every 4-5 instructions on average, that makes a max of 80k instructions. With a 60MHz clock, that is going to be about 1ms. What are you expecting?