Content originally posted in LPCWare by mathseng on Wed Oct 14 03:32:00 MST 2015
I understand that there is an earlier reply from NXP to use a timer. I used this advice.
Being concerned about the RTS front porch issues (lots of comments in this forum), and not needing RS-485 address detection, the project uses RS-232 with RS-485 transport hardware.
Note: Some hardware engineers tell me that since the sampling is at the 8/16 point, the NXP RS-485 RTS timing should not be a problem.
This project uses a heavily modified version of "uart.c" from LPCXpresso v6. The code is now fully interrupt driven, feeding to/from circular buffers.
The RTS porch timing is done using a spare timer operated as a one-shot, started with the desired delay-count, and which interrupts on completion - the interrupt latency is not an issue. The code uses 2x bit-times as the front porch and 12x bit-times for the back porch. The timer parameters determine whether the timer IRQ feeds the UART for data transmission or turns off RTS.
On UART send, the code transfers as many bytes to the TX Circular Buffer as possible, turns on RTS, and triggers the 2 bit-times timer, with parameter 'frontPorch = true'. On timer completion, the timer IRQ sets a flag for the UART IRQ (parameter is pendingTHRE = true) and triggers a UART interrupt using NVIC_SetPendingIRQ(USART_IRQn), which actions after the timer IRQ exits. The UART IRQ treats this flag as if the THRE IntID has occurred and fills the Fifo and starts the data transmission. (ie only the IRQ extracts data from the Tx Circular Buffer for sending, so need to disable ints to prevent mismatched data). This mechanism is always safe and allows concatenated sends without pulsing RTS.
On data exhaustion, the UART IRQ is raised with the THRE IntID. When it recognizes that there is no more data available (note: the last byte may still be in the process of being sent by the hardware), the UART IRQ triggers the 12 bit-times timer, which turns off the RTS signal in the timer IRQ at completion. (8 bit times for the possible character in the bit buffer, 4 bit times to clear the end of the transmitted byte for the RTS back porch).
Both of these delays work well at 115200, with the only side-effect being Breaks at the PC end at every end of transmission from the LPC, and it co-exists fine with FreeRTOS.
I hope that this technique is valid for helping with the AutoDir issue.
