Power up sequence of LPC55S1 when bypassing the internal DCDC

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Power up sequence of LPC55S1 when bypassing the internal DCDC

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268件の閲覧回数
JaehoonLee13
Contributor I

Hello,

We are designing the implantable device using LPC55S1 MCU and want to bypass the internal DCDC converter to avoid using an inductor.

I have read this post on the forum and understood the requirement and the unused pin connection.

Still need to figure out what will be the proper power up sequence to supply the core voltage to MCU.

Both USB0 and USB1 are used  and the VBAT = 1.8V  in our design, hence we do have 3 distinct voltage rails: 1.8V(VBAT), 3.3V(USB), 1.1V(Core)

Could you please guide the proper powering up sequence in such case?

 

One additional question regarding using 1.2V for the core (I know it has already been discussed in the previous post) is that what would be the trade-off using 1.2V for all frequency range ( less than 100MHz), assuming that the supply is well controlled not to exceed the maximum rating of VDD_PMU (1.26Vmax_absolute)? 

JaehoonLee13_0-1718645059103.png

 

Best,

Jaehoon

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218件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that the LDO can provide stable output supply voltage with low efficiency, while the DC/DC converter can provide output supply voltage with ripple but high efficiency.

Regarding the recommendation of internal DC/Dc converter, based on AE team advise, we never fully tested for using external LDO for the VDD_PMU power supply.

But I think it is okay, you can use 1.2V LDO for the VDD_PMU, which will cover all the core clock frequency.

Hope it can help you

BR

Xiangjun Rong

 

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39件の閲覧回数
shreiyib
Contributor I

I am facing the same issue yestoday, now I found this. Thanks.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose that you have power supply rails:

1.8V for for VDD, VDDA,Vrefp, VBAT_DCDC, VBAT_PMU pins

3.3V for  USB0_3V3, USB1_3V3 pins

1.1V for VDD_PMU

The 1.8V  starts-up firstly, the 1.1V appears secondly. The USBx_3v3 pins provide power for only USB module, they can appear anytime.

Anyway, we suggest you use internal DC/Dc converter.

Hope it can help you

BR

XiangJun Rong

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231件の閲覧回数
JaehoonLee13
Contributor I

Thanks XiangJun for your reply.

Could you please explain more details of the potential risks of not using an internal DCDC?

Is it purely because of setting a different voltage level depending on the operating frequency? What is the downside of using a higher voltage (such as 1.2V) for all frequency range? Maybe more power consumption?

I would like to understand the trade-offs between using an internal DCDC versus external LDO.

 

Best,

Jaehoon

 

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219件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that the LDO can provide stable output supply voltage with low efficiency, while the DC/DC converter can provide output supply voltage with ripple but high efficiency.

Regarding the recommendation of internal DC/Dc converter, based on AE team advise, we never fully tested for using external LDO for the VDD_PMU power supply.

But I think it is okay, you can use 1.2V LDO for the VDD_PMU, which will cover all the core clock frequency.

Hope it can help you

BR

Xiangjun Rong

 

163件の閲覧回数
JaehoonLee13
Contributor I
Thank you!
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