Hi !
I can see automatic pin muxing generate a lot of dependencied from chip version
if (Chip_GetVersion()==1)
{
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT19 (pin 10) is configured as PIO1_9. */
| IOCON_PIO_FUNC(PIO1_9_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_9_DIGIMODE_DIGITAL));
}
else
{
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT19 (pin 10) is configured as PIO1_9. */
| IOCON_PIO_FUNC(PIO1_9_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_9_DIGIMODE_DIGITAL));
}
But code looks exactly the same.
Can ConfigTool be configure for support 1B and up revisions only or just latest one.
It looks as some overhead what is no need any more.
Regards,
Eugene
Hi, Eugene,
I have tried to generate the code to configure the PIO1_9 as GPIO function with PinsConfigureTools on MCUXpresso tools, I get the same code.
From the Table 317, the AWS bit is valid only when the pin is configured as analog mode by clearing the DIGIMODE bit in IOCON register.
I think the code are the same no matter whether the revision is, the pin configuration is nothing to do with chip version when the pin is configured as GPIO mode.
Hope it can help you.
BR
XiangJun Rong
BR
XiangJun Rong
Hi xiangjun.rong !
So this is defect in configuration tool or how to set only 1B revision in it for have clean code ?
Regards,
Eugene
Hi, Eugene,
At the timing being, the PinConfiguration Tools is not smart enough to identify the revision of the chip and generate the corresponding code based on chip revision.
BR
XiangJun Rong