LPC4357FET256 USB0 VBUS

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LPC4357FET256 USB0 VBUS

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by bpetty on Thu Mar 03 08:38:35 MST 2016
I have run across some conflicting information and I need to track down the correct answer.

In the datasheet for the LPC4357FET256, page 57 lists the pin description for USB0_VBUS. It lists notes 6 and 7 for this pin. Note 6 on page 60 states: 5 V tolerant transparent analog pad.

However, in the LPC4357FET256 User’s Manual, in Chapter 25 (USB0) and on page 644 is states: This input is only 5 V tolerant when VDDIO is present.

Which is correct? I need to know if the dedicate pin on the device, USB0_VBUS is 5V tolerant when power (VDDIO) is NOT present.

Many thanks,

Brian
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lpcware
NXP Employee
NXP Employee
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by bavarian on Wed Mar 09 06:46:36 MST 2016
The VBUS pin is only 5V tolerant when VDDIO is present.
In case of a bus powered device you need to add a protection, for example a simple AND picoGate device which only switches to '1' if VDDIO and VBUS are there. The resistor based voltage divider solution shown in the data sheet is a little bit tricky to use, so I don't recommend that.

Regards,
NXP Support Team
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