LPC4350 New Board Startup Problems

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LPC4350 New Board Startup Problems

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Thu Aug 16 05:54:27 MST 2012
We have just got a newly designed board up and running with the LPC4350.  We are using external 32 bit SRAM and static flash as well as SDRAM on the board.  We are using IAR EWARM along with the Segger Cortex M J-Trace debugging module.  At this point I am trying to get the flashing algorithm updated to work with the 32 bit flash.  Previously I have been doing all of my development with the Hitex A4 board and having very good luck with all the tools for the most part.

I can download code into internal RAM and the code runs.  We are having some problems though where the LPC4350 peripheral modules do not seem to be working properly much of the time right after the initial download through IAR.  About 1 time out of 3 or 4, everything works perfectly:  I can run code, program the external flash and read/write to the external SRAM.  The other 3 or 4 times, when the IAR EWARM finishes downloading the code, and you are setting at the main entry point, if you open up the register view, all ARM Cortex Core registers function just fine.  The NXP LPC4350 specific registers like the EMC however, display all AAA’s for every value.   When the LPC4350 comes up in this state, the code will run fine until it tries to read or write any of the NXP LPC4350 specific registers and then everything hangs any you get all sorts of error dialogs and you have to start the debugging session over again and again until everything comes up properly.

Also, we are using an LPC4350 with the following markings:
LPC4350FET256
PFM906.04   15
ESD1148ZRY
We currently have two boards assembled and both boards are behaving in the same fashion.

I have checked the reset line and as many other things that I can think of to solve the problem but can’t seem to figure it out.  Do you have any suggestions as to where we should concentrate or where to look for clues to point us in the right direction.

Greg Dunn
304-757-6565
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Mon Aug 27 19:53:33 MST 2012
Thank you for your reply.  I think this actually turned out to be my problem.  The IAR startup code was linked to higher address space and was being ran before I was able to initialize the high order address lines.  I updated the linker control file to force all startup code to the beginning of flash and that resolved the problem.  Thanks again.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Fri Aug 24 18:19:41 MST 2012
Hi Greg,
LPC4350 Boot loader will configure EMC addresses EMC_A(13:0). If you are using more than 16KB flash memory you need to configure higher address lines. This configuration code should be within 16KB of flash memory and need to be copied into internal SRAM during initialization.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Thu Aug 16 13:41:34 MST 2012
This issue occurs as soon as you download the image, before it even runs any code to change the core speed.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by a5856 on Thu Aug 16 11:54:47 MST 2012
Try to reduce core speed...

http://www.lpcware.com/content/forum/undocumented-error-changing-core-speed-204mhz
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