LPC4350 (LBGA256) SDRAM Clock problem

[lpcware]

Content originally posted in LPCWare by paulheays on Mon Dec 10 16:09:10 MST 2012
Our product uses the LPC4350 (LBGA256 package) with a Micron MT48LC4M32B2P configured to use DYCS1 area (0x30000000..0x3FFFFFFF).   We are also using the SD card interface and supplying the clock for this from the CLK0 pin.

Unfortunately we have had significant trouble getting the SDRAM to work in this configuration.  We have now discovered that the only way of getting the SDRAM in the DYCS1 area to work properly is by configuring the CLK0, CLK1 and CLK2 pins to function 0 (output SDRAM clocks EMC_CLK0, EMC_CLK1 and EMC_CLK3 respectively).

In an attempt to isolate this problem I used a Keil MCB4300 board running the Keil “Blinky” example code.  I modified the “Blinky” code to perform a test of the entire 16MB of SDRAM located in the DYCS0 area once the EMC port has been configured.  With CLK0 to CLK3 pins all set to function 0 (output SDRAM clocks EMC_CLK0, EMC_CLK1, EMC_CLK3 and EMC_CLK2 respectively) the RAM test passes. However if either CLK1 or CLK2 are set to any other function the RAM is either not accessible or the test fails.

Unfortunately this means that if we use the SDRAM we cannot use the SD card interface as the only other pin available for the SD card clock is PC_0 which is needed for other purposes.

Could this be why the Keil MCB4300 uses the SPI interface for the SD card and the Keil example code specifically configures CLK0 to CLK3 as EMC_CLKx  outputs?

I am quite desperate for a fix or work around to this problem as bugs in this chip have cost us significant time and money and have come very close to losing us a significant customer.  Having to redesign our complex board again is not an option for us.

Thanks in advance for you help.
Paul Heays.

[lpcware]

Content originally posted in LPCWare by paulheays on Tue Dec 11 17:58:20 MST 2012
Dave,
Thanks for the info but I have tried using CLK01 option for CLK0 and CLK23 option for CLK2 and while this did allow CLK1 and CLK3 to be used for another function these pins do not support the SD Card clock function.

I have just tried the following again to confirm this.

Hardware setup:
SDRAM_CLK is connected to CLK0, SDRAM_CS connected to DYCS0 and SDRAM_CKE connected to EMC_CKEOUT0.

1.First of all I set CLK0..CLK3 to function 0 (EMC_CLKn) and the SDRAM worked fine.
2.Then I set CLK0 to function 5 (EMC_CLK01) and CLK1..CLK3 to function 0 (EMC_CLKn) and the SDRAM also worked fine.
3.Then I set CLK0 to function 5 (EMC_CLK01),  CLK1 to function 1 (CLKOUT), CLK2 to function 0 (EMC_CLK3) and CLK3 to function 0 (EMC_CLK2) and the SDRAM also worked fine.
4.Then I set CLK0 to function 5 (EMC_CLK01),  CLK1 to function 1 (CLKOUT), CLK2 function 5 (EMC_CLK23) and CLK3 to function 1 (CLKOUT) and the SDRAM also worked fine.
5.Then I set CLK0 to function 5 (EMC_CLK01),  CLK1 to function 0 (EMC_CLK1), CLK2 to function 4 (SD_CLK) and CLK3 to function 0 (EMC_CLK2) and SDRAM did not work.

This seems to confirm that when using SDRAM the only clock pin that is available for the SD card is PC_0. 

Thanks for your help.
Paul.

[lpcware]

Content originally posted in LPCWare by paulheays on Tue Dec 11 17:28:00 MST 2012
Thank you for the info.  Unfortunately we had overlooked that section of the datasheet. Very sad for us.

[lpcware]

Content originally posted in LPCWare by nxp21346 on Tue Dec 11 14:25:55 MST 2012
Another option for the EMC is to use the CLK01 and CLK23 pin functions on pins CLK0 and CLK2, then you can use the other two clk pins (CLK1 and CLK3) for other functions.

-Dave @ NXP

[lpcware]

Content originally posted in LPCWare by wmues on Tue Dec 11 03:27:50 MST 2012
"The EMC dynamic memory interface requires that all EMC_CLK signals are selected on
the CLKn pins for 16-bit memory and for 32-bit memory." User Manual, Chapter 21.8.3.

Out of luck?